Transistor device and materials for making
US-9318591-B2 · Apr 19, 2016 · US
US2016190244A1 · US · A1
| Field | Value |
|---|---|
| Publication number | US-2016190244-A1 |
| Application number | US-201514728583-A |
| Country | US |
| Kind code | A1 |
| Filing date | Jun 2, 2015 |
| Priority date | Dec 30, 2014 |
| Publication date | Jun 30, 2016 |
| Grant date | — |
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An electronic device includes first and second electrodes that are spaced apart from each other and a 2D material layer. The 2D material layer connects the first and second electrodes. The 2D material layer includes a plurality of 2D nanomaterials. At least some of the 2D nanomaterials overlap one another.
Opening claim text (preview).
1 . An electronic device comprising: a first electrode; a second electrode spaced apart from the first electrode; a two-dimensional (2D) material layer connected to the first and second electrodes, the 2D material layer including a plurality of 2D nanomaterials, at least some of the 2D nanomaterials overlapping one another. 2 . The electronic device of claim 1 , wherein the 2D nanomaterials have semiconductor characteristics. 3 . The electronic device of claim 2 , wherein the 2D material layer further includes a conductive material. 4 . The electronic device of claim 3 , wherein the conductive material includes at least one of graphene, conductive particles, conductive nanotubes, and conductive nanowires. 5 . The electronic device of claim 2 , wherein the 2D material layer further includes a dopant. 6 . The electronic device of claim 2 , wherein the 2D material layer is a channel layer of the electronic device. 7 . The electronic device of claim 6 , further comprising: a gate insulating layer on the 2D material layer; and a gate electrode on the gate insulating layer. 8 . The electronic device of claim 2 , wherein a Schottky junction is formed between the 2D material layer and at least one of the first and second electrodes. 9 . The electronic device of claim 2 , wherein a p-n junction is formed between the plurality of 2D nanomaterials. 10 . The electronic device of claim 1 , wherein each of the plurality of 2D nanomaterials include at least one layer. 11 . The electronic device of claim 1 , wherein each of the plurality of 2D nanomaterials include at least one of a transition metal dichalcogenide (TMD), phosphorene, germanane, and silicene. 12 . A method of manufacturing an electronic device, the method comprising: forming by inkjet printing a two-dimensional (2D) material layer on a substrate, the 2D material layer including a plurality of 2D nanomaterials that have semiconductor characteristics and at least some of the plurality of 2D nanomaterials overlap one another; and forming a first electrode and a second electrode that are connected to the 2D material layer. 13 . The method of claim 12 , wherein the forming the 2D material layer includes: forming an ink pattern by ejecting ink onto the substrate, the ink including a solvent and the 2D nanomaterials; and drying the ink pattern. 14 . The method of claim 13 , wherein a mixture ratio of the 2D nanomaterials to the solvent in the ink ranges from about 1 μg/mL to about 100 mg/mL. 15 . The method of claim 13 , wherein the ink further includes a conductive material. 16 . The method of claim 13 , wherein the ink further includes a dopant. 17 . The method of claim 13 , wherein the 2D nanomaterials are doped with impurities. 18 . The method of claim 12 , wherein the first and second electrodes are formed by inkjet printing. 19 . The method of claim 12 , further comprising: forming a gate insulating layer on the 2D material layer; and forming a gate electrode on the gate insulating layer. 20 . The method of claim 19 , wherein the gate insulating layer and the gate electrode are formed by inkjet printing. 21 . A method of manufacturing an electronic device, the method comprising: forming a two-dimensional (2D) material layer, the 2D material layer including a plurality of 2D nanomaterials that have semiconductor characteristics, at least some of the 2D nanomaterials overlap one another; forming a first electrode connected to a first part of the 2D material layer; and forming a second electrode connected to a second part of the 2D material layer, the second electrode spaced apart from the first electrode. 22 . The method of claim 21 , further comprising: forming a gate electrode on a substrate; and forming a gate insulating layer on the substrate, wherein the forming the 2D material layer includes inkjet printing an ink pattern on the substrate and drying the ink pattern, the ink includes a solvent and the 2D nanomaterials, the forming the gate insulating layer includes one of, forming the gate insulating layer on top of the gate electrode, and forming the gate insulating layer between the gate electrode and the substrate, and the gate insulating layer extends between the 2D material layer and the gate electrode. 23 . The method of claim 21 , wherein the 2D nanomaterials include one of a transition metal dichalcogenide (TMD), phosphorene, germanane, and silicene. 24 . The method of claim 21 , wherein the forming the first electrode includes forming a Schottky junction between the 2D material layer and the first electrode at the first part of the 2D material layer 25 . The method of claim 21 , wherein the 2D material layer includes one of a conductive material and a dopant on the 2D nanomaterials, and the conductive material includes one of graphene, conductive particles, conductive nanotubes, and conductive nanowires.
Microstructure · CPC title
using solutions · CPC title
being chalcogenide semiconductor materials not being oxides, e.g. ternary compounds · CPC title
of electrodes ohmically coupled to a semiconductor · CPC title
of FETs having heterojunction interface channels or heterojunction gate electrodes, e.g. HEMT · CPC title
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