Efficient decoder for current-steering digital-to-analog converter

US2016149587A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2016149587-A1
Application numberUS-201414565172-A
CountryUS
Kind codeA1
Filing dateDec 9, 2014
Priority dateNov 24, 2014
Publication dateMay 26, 2016
Grant date

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Abstract

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A decoder for a current-steering digital-to-analog converter (DAC) is described herein. In an embodiment, the decoder is a dynamic element matching (DEM) row/column decoder that randomizes pairs of row control signals and column control signals that are provided to a matrix of current cells. The randomization is performed in a manner that ensures that the pairs of row control signals are randomized as pairs. In another embodiment, the decoder is an N-dimensional decoder, where N is any integer greater than two. The N-dimensional decoder comprises an N number of decoders that are each configured to provide respective control signals that are provided to current source(s) in current cell(s) in a respective dimension of an N-dimensional matrix of current cells for enabling current source(s) included therein. Such decoders advantageously allow for a simpler, more efficient design compared to a non-segmented, unary DAC due to the smaller area and lower power consumed.

First claim

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1 . An apparatus, comprising: a first decoder configured to decode a first plurality of input data bits to generate a first plurality of decoded bits; a first randomizer coupled to the first decoder, the first randomizer configured to randomize the first plurality of decoded bits to generate a first plurality of randomized bits, the first plurality of randomized bits being provided to one or more current cells in one or more rows of a matrix of current cells; a second decoder configured to decode a second plurality of input data bits to generate a second plurality of decoded bits; and a second randomizer coupled to the second decoder, the second decoder configured to randomize the second plurality of decoded bits to generate a second plurality of randomized bits, the second plurality of randomized bits being provided to one or more current cells in one or more columns of the matrix of current cells. 2 . (canceled) 3 . The apparatus of claim 2 , wherein the first decoder comprises a first binary-to-thermometer decoder, and wherein the second decoder comprises a second binary-to-thermometer decoder. 4 . The apparatus of claim 1 , wherein the first randomizer comprises two randomizers, a first of the two randomizers being configured to receive and randomize the first plurality of decoded bits to generate a first subset of the first plurality of randomized bits and a second of the two randomizers being configured to receive and randomize the first plurality of decoded bits to generate a second subset of the first plurality of randomized bits. 5 . The apparatus of claim 4 , wherein the first of the two randomizers is configured to randomize the first plurality of the decoded bits based on a first pseudorandom bit sequence and the second of the two randomizers is configured to randomize the first plurality of the decoded bits based on a second pseudorandom bit sequence. 6 . The apparatus of claim 5 , wherein the first pseudorandom bit sequence and the second pseudorandom bit sequence are the same. 7 . The apparatus of claim 5 , wherein the first of the two randomizers is configured to randomize the first plurality of the decoded bits based on the first pseudorandom bit sequence by shifting the first plurality of the decoded bits by a number of bits specified by the first pseudorandom bit sequence, and wherein the second of the two randomizers is configured to randomize the first plurality of the decoded bits based on the second pseudorandom bit sequence by shifting the first plurality of the decoded bits by a number of bits specified by the second pseudorandom bit sequence. 8 . The apparatus of claim 1 , wherein the first plurality of randomized bits comprises a first subset of randomized bits and a second subset of randomized bits, wherein the first subset of randomized bits correspond to a first subset of row control signals and the second subset of randomized bits correspond to a second subset of row control signals, wherein each row of the one or more rows of current cells of the matrix of current cells is coupled to a respective row control signal of the first subset of row control signals and a respective row control signal of the second subset of row control signals; and wherein the second plurality of randomized bits correspond to column control signals, wherein each column of the one or more columns of current cells in the matrix of current cells is coupled to a respective column control signal of the column control signals. 9 . The apparatus of claim 8 , wherein current sources in a particular row of the one or more rows of current cells in the matrix of current cells are enabled in response to a determination that a row control signal of the first subset of row control signals coupled to the particular row is enabled. 10 . The apparatus of claim 8 , wherein a particular current source in the matrix of current cells is enabled in response to a determination that a row control signal of the second subset of row control signals coupled to the particular current source and a column control signal coupled to the particular current source are enabled. 11 . A method, comprising: receiving a first plurality of input data bits, generating a first plurality of randomized bits based on the first plurality of input data bits, and providing the first plurality of randomized bits to a plurality of rows of a matrix of current cells; and receiving a second plurality of input data bits, generating a second plurality of randomized bits based on the second plurality of input data bits, and providing the second plurality of randomized bits to a plurality of columns of the matrix of current cells, the first plurality of randomized bits and the second plurality of randomized bits being configured to enable one or more current sources in the matrix of current cells. 12 . The method of claim 11 , wherein said receiving a first plurality of input data bits, generating a first plurality of randomized bits based on the first plurality of input data bits, and providing the first plurality of randomized bits to a plurality of rows of a matrix of current cells comprises: receiving the first plurality of input data bits and generating a first plurality of decoded bits based on the first plurality of input data bits; and receiving and randomizing the first plurality of decoded bits to generate the plurality of randomized bits. 13 . The method of claim 12 , wherein said receiving and randomizing the first plurality of decoded bits to generate the plurality of randomized bits comprises receiving and randomizing the first plurality of decoded bits to generate a first subset of the first plurality of randomized bits and receiving and randomizing the first plurality of decoded bits to generate a second subset of the first plurality of randomized bits. 14 . The apparatus of claim 13 , wherein said receiving and randomizing the first plurality of decoded bits to generate a first subset of the first plurality of randomized bits comprises randomizing the first plurality of decoded bits based on a first pseudorandom bit sequence and said receiving and randomizing the first plurality of decoded bits to generate a second subset of the first plurality of randomized bits comprises randomizing the first plurality of decoded bits based on a second pseudorandom bit sequence. 15 . The method of claim 14 , wherein the first pseudorandom bit sequence and the second pseudorandom bit sequence are the same. 16 . The method of claim 11 , wherein the first plurality of randomized bits comprises a first subset of randomized bits and a second subset of randomized bits, wherein the first subset of randomized bits correspond to a first subset of row control signals and the second subset of randomized bits correspond to a second subset of row control signals, wherein each row of current cells of the matrix of current cells is coupled to a respective row control signal of the first subset of row control signals and a respective row control signal of the second subset of row control signals; and wherein the second plurality of randomized bits correspond to column control signals, wherein each column of current cells in the matrix of current cells is coupled to a respective column control signal of the column control signals. 17 . The method of claim 16 , further comprising: determining that a row control signal of the first subset of row control signals coupled to a particular row of current cells of the matrix of current cells is enabled; and enabling a plurality of current sources in the particular row in response to

Assignees

Inventors

Classifications

  • H03M7/165Primary

    Conversion to or from thermometric code · CPC title

  • with equal currents which are switched by unary decoded digital signals · CPC title

  • using different permutation circuits for different parts of the digital signal · CPC title

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What does patent US2016149587A1 cover?
A decoder for a current-steering digital-to-analog converter (DAC) is described herein. In an embodiment, the decoder is a dynamic element matching (DEM) row/column decoder that randomizes pairs of row control signals and column control signals that are provided to a matrix of current cells. The randomization is performed in a manner that ensures that the pairs of row control signals are random…
Who is the assignee on this patent?
Broadcom Corp
What technology area does this patent fall under?
Primary CPC classification H03M7/165. Mapped technology areas include Electricity.
When was this patent published?
Publication date Thu May 26 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).