In-die transistor characterization in an ic

Patent metadata

Field	Value
Publication number	US-2016097805-A1
Application number	US-201414505240-A
Country	US
Kind code	A1
Filing date	Oct 2, 2014
Priority date	Oct 2, 2014
Publication date	Apr 7, 2016
Grant date	—

Abstract

In an example implementation, an integrated circuit (IC) includes: a plurality of transistors disposed in a plurality of locations on a die of the IC; conductors coupled to terminals of each of the plurality of transistors; a digital-to-analog converter (DAC), coupled to the conductors, to drive voltage signals to the plurality of transistors in response to a digital input; and an analog-to-digital converter (ADC), coupled to at least a portion of the conductors, to generate samples in response to current signals induced in the plurality of transistors in response to the voltage signals, the samples being indicative of at least one electrostatic characteristic for the plurality of transistors.

First claim

What is claimed is:

1 . An integrated circuit (IC), comprising:
a plurality of transistors disposed in a plurality of locations on a die of the IC; conductors coupled to terminals of each of the plurality of transistors; a digital-to-analog converter (DAC), coupled to the conductors, to drive the plurality of transistors with voltage signals in response to a digital input; and an analog-to-digital converter (ADC), coupled to at least a portion of the conductors, to generate samples in response to current signals induced in the plurality of transistors in response to the voltage signals, the samples being indicative of at least one electrostatic characteristic for the plurality of transistors.

2 . The IC of claim 1 , further comprising:
at least one contact configured for probing by a tester, the at least one contact coupled to the ADC to output the samples.

3 . The IC of claim 1 , further comprising:
a memory circuit coupled to the ADC to store the samples.

4 . The IC of claim 1 , further comprising:
a test circuit coupled to the ADC to receive the samples.

5 . The IC of claim 4 , wherein the test circuit is configured in programmable logic of the IC.

6 . The IC of claim 4 , wherein the test circuit is configured to derive the at least one electrostatic characteristic for the plurality of transistors from the samples.

7 . The IC of claim 6 , wherein a first measurement of the at least one electrostatic characteristic derived from a first sample for a first transistor in a first location exhibits variation as compared to a second measurement of the at least one electrostatic characteristic derived from a second sample for a second transistor in a second location.

8 . The IC of claim 1 , wherein the conductors are part of programmable interconnect of the IC.

9 . The IC of claim 1 , further comprising:
at least one analog circuit configured to generate analog signals derived from the induced current signals; wherein the ADC generates samples of the analog signals.

10 . A system to test an integrated circuit (IC), comprising:
a plurality of transistor modules disposed in a plurality of locations on a die of the IC; a control circuit on the IC and coupled to the plurality of transistor modules, configured to drive the plurality of transistor modules to obtain test measurements; and a test circuit on the IC and coupled to the control circuit, configured to derive transistor characteristics from the test measurements.

11 . The system of claim 10 , wherein the plurality of transistor modules include at least one transistor.

12 . The system of claim 10 , wherein the control circuit comprises:
a digital-to-analog converter (DAC), coupled to the plurality of transistor modules, to provide voltage signals; and an analog-to-digital converter (ADC), coupled to the plurality of transistor modules, to generate samples in response to induced current signals.

13 . The system of claim 10 , wherein the test circuit is configured in programmable logic of the IC.

14 . The system of claim 10 , wherein the control circuit is coupled to the plurality of transistor modules through programmable interconnect of the IC.

15 . A method of testing an integrated circuit (IC), comprising:
driving voltage signals to a plurality of transistors disposed in a plurality of locations on a die of the IC using a digital-to-analog converter (DAC) on the IC; generating samples in response to induced current signals in the plurality of transistors in using an analog-to-digital converter (ADC) on the IC; and deriving at least one electrostatic characteristic for the plurality of transistors from the samples.

16 . The method of claim 15 , further comprising:
configuring programmable interconnect of the IC to selectively couple the DAC and ADC to the plurality of transistors.

17 . The method of claim 15 , performing the steps of driving and generating after the IC has been sorted and packaged.

18 . The method of claim 15 , further comprising:
configuring programmable logic of the IC to implement a test circuit; and receiving the samples at the test circuit.

19 . The method of claim 18 , wherein the step of deriving the at least one electrostatic characteristic for the plurality of transistors from the samples is performed by the test circuit.

20 . The method of claim 19 , wherein a first measurement of the at least one electrostatic characteristic derived from a first sample for a first transistor in a first location exhibits variation as compared to a second measurement of the at least one electrostatic characteristic derived from a second sample for a second transistor in a second location.

Assignees

• Xilinx Inc
• Xilinx Inc

Inventors

• Yeh Ping-Chin
• Jennings John K
• Nathanael Rhesa
• Chong Nui
• Chang Cheang-Whang
• Chung Daniel Y

Classifications

• G01R31/2851 Primary

  Testing of integrated circuits [IC] (G01R31/317 takes precedence; testing individual devices G01R31/26; testing printed circuits G01R31/2801) · CPC title

• G01R31/2843

  In-circuit-testing · CPC title

• G01R31/2837 Primary

  Characterising or performance testing, e.g. of frequency response (transient response G01R27/28) · CPC title

• G01R31/3167

  Testing of combined analog and digital circuits {(testing ADC's H03M1/1071)} · CPC title