Semiconductor Device and Method of Forming a Shielding Layer Between Stacked Semiconductor Die

Patent metadata

Field	Value
Publication number	US-2015115394-A1
Application number	US-201414553358-A
Country	US
Kind code	A1
Filing date	Nov 25, 2014
Priority date	Mar 25, 2009
Publication date	Apr 30, 2015
Grant date	—

Abstract

A semiconductor device has a first semiconductor die with a shielding layer formed over its back surface. The first semiconductor die is mounted to a carrier. A first insulating layer is formed over the shielding layer. A second semiconductor die is mounted over the first semiconductor die separated by the shielding layer and first insulating layer. A second insulating layer is deposited over the first and second semiconductor die. A first interconnect structure is formed over the second semiconductor die and second insulating layer. A second interconnect structure is formed over the first semiconductor die and second insulating layer. The shielding layer is electrically connected to a low-impedance ground point through a bond wire, RDL, or TSV. The second semiconductor die may also have a shielding layer formed on its back surface. The semiconductor die are bonded through the metal-to-metal shielding layers.

First claim

What is claimed:

1 . A method of making a semiconductor device, comprising:
providing a first semiconductor die; forming a shielding layer over the first semiconductor die; disposing a second semiconductor die over the shielding layer; and electrically connecting the shielding layer to a ground point.

2 . The method of claim 1 , further including forming a first interconnect structure over the first semiconductor die.

3 . The method of claim 2 , further including forming a second interconnect structure over the second semiconductor die opposite the first interconnect structure.

4 . The method of claim 3 , further including forming a conductive pillar between the first interconnect structure and second interconnect structure.

5 . The method of claim 1 , further including forming a bond wire between the shielding layer and first interconnect structure.

6 . The method of claim 1 , further including forming a conductive via through the first semiconductor die.

7 . A method of making a semiconductor device, comprising:
providing a first semiconductor die; forming a shielding layer over the first semiconductor die; and disposing a second semiconductor die over the shielding layer.

8 . The method of claim 7 , further including forming a first interconnect structure over the first semiconductor die and electrically connected to the shielding layer.

9 . The method of claim 8 , further including forming a second interconnect structure over the second semiconductor die opposite the first interconnect structure.

10 . The method of claim 9 , further including forming a conductive pillar between the first interconnect structure and second interconnect structure.

11 . The method of claim 7 , further including forming a bond wire between the shielding layer and first interconnect structure.

12 . The method of claim 7 , further including forming a conductive via through the first semiconductor die.

13 . The method of claim 7 , further including forming an insulating layer between the first semiconductor die and second semiconductor die.

14 . A semiconductor device, comprising:
a first semiconductor die; a shielding layer formed over the first semiconductor die; a second semiconductor die disposed over the shielding layer; and a first interconnect structure disposed over the first semiconductor die and electrically connected to the shielding layer.

15 . The semiconductor device of claim 14 , further including a second interconnect structure formed over the first semiconductor die opposite the first interconnect structure.

16 . The semiconductor device of claim 15 , further including a conductive pillar disposed between the first interconnect structure and second interconnect structure.

17 . The semiconductor device of claim 14 , further including a bond wire formed between the shielding layer and first interconnect structure.

18 . The semiconductor device of claim 14 , further including a conductive via formed through the first semiconductor die.

19 . The semiconductor device of claim 14 , further including an insulating layer disposed between the first semiconductor die and second semiconductor die.

20 . A semiconductor device, comprising:
a first semiconductor die; a shielding layer formed over the first semiconductor die; and a second semiconductor die disposed over the shielding layer.

21 . The semiconductor device of claim 20 , further including a first interconnect structure formed over the first semiconductor die.

22 . The semiconductor device of claim 21 , further including a second interconnect structure formed over the second semiconductor die opposite the first interconnect structure.

23 . The semiconductor device of claim 21 , further including a bond wire formed between the shielding layer and first interconnect structure.

24 . The semiconductor device of claim 20 , further including a conductive via formed through the first semiconductor die.

25 . The semiconductor device of claim 20 , further including an insulating layer disposed between the first semiconductor die and second semiconductor die.

Assignees

• Stats Chippac Ltd

Inventors

• Pagaila Reza A
• Do Byung Tai
• Suthiwongsunthorn Nathapong

Classifications

• H10W90/734

  between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

• H10W90/732

  between stacked chips · CPC title

• H10W90/724

  between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

• H10W74/15

  on active surfaces of flip-chip devices, e.g. underfills · CPC title

• H10W74/00

  Encapsulations, e.g. protective coatings · CPC title