Electronic device and method for manufacturing electronic device

US12588351B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-12588351-B2
Application numberUS-202118256084-A
CountryUS
Kind codeB2
Filing dateDec 8, 2021
Priority dateDec 16, 2020
Publication dateMar 24, 2026
Grant dateMar 24, 2026

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  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

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Abstract

Official abstract text for this publication.

Light reduction in a wiring part connected to an optical device of an electronic device including the optical device is prevented. The electronic device includes an insulating layer, an interlayer connection wiring, and an upper layer wiring. The insulating layer is disposed adjacent to the lower layer wiring and includes a through hole. The interlayer connection wiring is a transparent wiring that is connected to the lower layer wiring in the through hole and is formed into a shape extending to a surface side of the insulating layer. The upper layer wiring is a transparent wiring that is stacked and connected to the interlayer connection wiring extending to the surface side of the insulating layer.

First claim

Opening claim text (preview).

The invention claimed is: 1 . An electronic device, comprising: a first insulating layer disposed adjacent to a lower layer wiring, the first insulating layer including a through hole; a transparent interlayer connection wiring connected to the lower layer wiring in the through hole, wherein the transparent interlayer connection wiring has a shape that extends to a surface side of the first insulating layer; a transparent upper layer wiring stacked on and connected to the transparent interlayer connection wiring that extends to the surface side of the first insulating layer, wherein the transparent upper layer wiring is connected to the transparent interlayer connection wiring; and a second insulating layer adjacent to the first insulating layer and adjacent to a side surface of the transparent interlayer connection wiring and a side surface of the transparent upper layer wiring, wherein the second insulating layer has a refractive index different from a refractive index of the first insulating layer. 2 . The electronic device according to claim 1 , further comprising an embedded part that includes a transparent member, wherein the embedded part is in a recess of the transparent interlayer connection wiring, formation of the recess is based on the through hole, and wherein the transparent upper layer wiring is adjacent to a surface of the embedded part. 3 . The electronic device according to claim 2 , wherein the embedded part includes an insulator. 4 . The electronic device according to claim 3 , wherein the embedded part includes one of silicon oxide (SiO 2 ), silicon nitride (SIN), silicon oxynitride (SiON), silicon oxycarbide (SiOC), fluorine-doped silicon oxide (SiOF), carbon-doped silicon oxide (SiOCH), niobium oxide (Nb 2 O 5 ), hafnium oxide (HfO 2 ), boron silicate glass (BSG), or boron phosphorus silicate glass (BPSG). 5 . The electronic device according to claim 3 , wherein the embedded part has a refractive index different from the refractive index of the first insulating layer. 6 . The electronic device according to claim 2 , wherein the embedded part includes a conductive member. 7 . The electronic device according to claim 6 , wherein the embedded part includes a member that constitutes the transparent upper layer wiring. 8 . The electronic device according to claim 1 , further comprising a plurality of two-layer wiring parts including the first insulating layer, the transparent interlayer connection wiring, and the transparent upper layer wiring in a stacked arrangement. 9 . The electronic device according to claim 1 , wherein the transparent interlayer connection wiring has a refractive index different from the refractive index of the first insulating layer. 10 . The electronic device according to claim 1 , wherein the through hole has a tapered shape. 11 . The electronic device according to claim 10 , wherein the through hole has the tapered shape having an angle of at least 50 degrees. 12 . The electronic device according to claim 1 , wherein the transparent interlayer connection wiring includes one of indium-tin oxide (ITO), indium-zinc oxide (IZO), tin oxide (SnO x ), zinc oxide (ZnO x ), titanium oxide (TiO x ), or carbon nanotube (CNT). 13 . The electronic device according to claim 1 , wherein the transparent upper layer wiring includes one of indium-tin oxide (ITO), indium-zinc oxide (IZO), tin oxide (SnO x ), zinc oxide (ZnO x ), titanium oxide (TiO x ), or carbon nanotube (CNT). 14 . The electronic device according to claim 1 , further comprising a protective film disposed between the first insulating layer and at least one of the lower layer wiring and the transparent upper layer wiring. 15 . The electronic device according to claim 1 , further comprising a transparent lower layer wiring. 16 . The electronic device according to claim 15 , wherein the transparent lower layer wiring has a shape in which a specific wiring is embedded in a bottom surface. 17 . The electronic device according to claim 1 , further comprising an imaging device configured to generate an image signal based on incident light, wherein the transparent upper layer wiring is configured to transmit a signal to the imaging device. 18 . The electronic device according to claim 17 , further comprising a two-layer wiring part including the first insulating layer, the transparent interlayer connection wiring, and the transparent upper layer wiring, wherein the two- layer wiring part is around the imaging device.

Assignees

Inventors

Classifications

  • Integrated devices having a three-dimensional layout, e.g. 3D ICs · CPC title

  • H10K39/32Primary

    Organic image sensors · CPC title

  • Insulating materials thereof · CPC title

  • Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes · CPC title

  • Manufacture or treatment · CPC title

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Frequently asked questions

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What does patent US12588351B2 cover?
Light reduction in a wiring part connected to an optical device of an electronic device including the optical device is prevented. The electronic device includes an insulating layer, an interlayer connection wiring, and an upper layer wiring. The insulating layer is disposed adjacent to the lower layer wiring and includes a through hole. The interlayer connection wiring is a transparent wiring …
Who is the assignee on this patent?
Sony Semiconductor Solutions Corp
What technology area does this patent fall under?
Primary CPC classification H10K39/32. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Mar 24 2026 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).