Generation of random security circuit patterns for in-situ fabrication of tamper-respondent sensors

Patent metadata

Field	Value
Publication number	US-12581600-B2
Application number	US-202318463397-A
Country	US
Kind code	B2
Filing date	Sep 8, 2023
Priority date	Sep 8, 2023
Publication date	Mar 17, 2026
Grant date	Mar 17, 2026

Abstract

In-situ fabrication of tamper-respondent sensors with random security circuit patterns is provided. The method includes establishing a random security circuit pattern for fabricating a security circuit of a tamper-respondent sensor to enclose, at least in part, one or more components within a secure volume. The establishing includes generating a trace pattern extending once through nodes of a plurality of nodes dispersed within an area of the tamper-respondent sensor, and randomly modifying the trace pattern to produce a randomly modified trace pattern with a desired randomization index relative to a specified randomization threshold, and providing the randomly modified trace pattern as a random security circuit pattern. Further, the method includes initiating fabricating of the tamper-respondent sensor in-situ on a surface of an enclosure to facilitate defining the secure volume, with the fabricating using the random security circuit pattern.

First claim

What is claimed is:

1 . A computer-implemented method comprising:
establishing a random security circuit pattern for fabricating a security circuit of a tamper-respondent sensor to enclose, at least in part, one or more components within a secure volume, the establishing comprising:
generating a trace pattern extending once through nodes of a plurality of nodes dispersed within an area of the tamper-respondent sensor; and
randomly modifying the trace pattern to produce a randomly modified trace pattern with a desired randomization index relative to a specified randomization threshold, and providing the randomly modified trace pattern as the random security circuit pattern; and
initiating fabricating of the tamper-respondent sensor in-situ on a surface of an enclosure to facilitate defining the secure volume, the fabricating using the random security circuit pattern.

2 . The computer-implemented method of claim 1 , wherein the security circuit is a multilayer security circuit, and the random security circuit pattern is used in fabricating one layer of the multilayer security circuit, and wherein the method further comprises establishing a respective random security circuit pattern for each layer of multiple layers of the multilayer security circuit, and the initiating fabricating comprises initiating in-situ fabricating of the multilayer security circuit using the respective random security circuit patterns for the multiple layers of the multilayer security circuit.

3 . The computer-implemented method of claim 2 , wherein the initiating fabricating comprises initiating direct plating of the multilayer security circuit on the surface of the enclosure using the respective random security circuit patterns for the multiple layers of the multilayer security circuit.

4 . The computer-implemented method of claim 3 , wherein the surface of the enclosure comprises a curved surface, and wherein the direct plating includes using laser-patterning in fabricating the multilayer security circuit on the surface of the enclosure using the respective random security circuit patterns.

5 . The computer-implemented method of claim 1 , wherein the trace pattern extends once through each node of the plurality of nodes between an input node and an output node, and wherein the randomly modifying comprises randomly modifying the trace pattern while ensuring that the randomly modified trace pattern extends once through the nodes of the plurality of nodes between the input and output nodes, and continuing to randomly modify the randomly modified trace pattern until the desired randomization index relative to the specified randomization threshold is reached.

6 . The computer-implemented method of claim 1 , wherein generating the trace pattern comprises:
dispersing the plurality of nodes uniformly within the area of the tamper-respondent sensor; determining an input node and an output node of the plurality of nodes; creating the trace pattern extending once through the nodes of the plurality of nodes dispersed uniformly within the area of the tamper-respondent sensor between the input and output nodes.

7 . The computer-implemented method of claim 6 , wherein creating the trace pattern extending once through the plurality of nodes within the area comprises creating the trace pattern as a serpentine trace pattern extending through the plurality of nodes within the area using a self-avoiding walk sequence.

8 . The computer-implemented method of claim 6 , further comprising determining the randomization index for the randomly modified trace pattern, the determining of the randomization index comprising:
determining, for each of i×i sub-block sizes, a number N i of different sub-block trace types within the randomly modified trace pattern extending through the plurality of nodes dispersed within the area, wherein i≥2; determining, for each of the i×i sub-block sizes, a maximum possible number P i of different sub-block trace types within the randomly modified trace pattern extending through the plurality of nodes dispersed within the area; and ascertaining an entropy value for the randomly modified trace pattern using the number N i of different sub-block trace types within the randomly modified trace pattern, and the maximum possible number P i of different sub-block trace types within the randomly modified trace pattern, wherein the randomization index comprises the entropy value.

9 . The computer-implemented method of claim 8 , wherein ascertaining the entropy value comprises:

S
=

∑

i
=
2

n

⁢

N
i

/

∑

i
=
2

n

⁢

P
i

where:
S=the entropy value;
i=a size of the i×i sub-block;
N i =number of different sub-block trace types within an i×i sub-block of the randomly modified trace pattern extending through the plurality of nodes dispersed within the specified area; and
P i =maximum possible number of different sub-block types within an i×i sub-block of the randomly modified trace pattern extending through the plurality of nodes dispersed within the specified area.

10 . The computer-implemented method of claim 6 , wherein randomly modifying the trace pattern to produce the randomly modified trace pattern includes:
randomly opening a pair of adjacent trace segments of the trace pattern to produce a trace sub-chain unconnected to one of the input and output nodes; randomly opening another pair of adjacent trace segments of the trace pattern, the other pair of adjacent trace segments including a trace segment of the trace sub-chain; and reconnecting the trace sub-chain by adding trace segments connecting the opened pair of adjacent trace segments and adding trace segments connecting the other opened pair of trace segments to facilitate forming the randomly modified trace pattern.

11 . A computer system comprising:
a memory; and at least one processor in communication with the memory, wherein the computer system is configured to perform a method, the method comprising:
establishing a random security circuit pattern for fabricating a security circuit of a tamper-respondent sensor to enclose, at least in part, one or more components within a secure volume, the establishing comprising:
generating a trace pattern extending once through nodes of a plurality of nodes dispersed within an area of the tamper-respondent sensor; and
randomly modifying the trace pattern to produce a randomly modified trace pattern with a desired randomization index relative to a specified randomization threshold, and providing the randomly modified trace pattern as the random security circuit pattern; and

initiating fabricating of the tamper-respondent sensor in-situ on a surface of an enclosure to facilitate defining the secure volume, the fabricating using the random security circuit pattern.

12 . The computer system of claim 11 , wherein the security c

Assignees

• IBM

Inventors

• Zhang Hongqing
• Higby Arthur J
• Lewison David J
• Busby James
• Bunt Jay A
• Campbell Levi
• Buchling Rego Philipp K
• Li Shidong
• Tetreault Sylvain
• Luo Yu

Classifications

• H05K3/18

  using precipitation techniques to apply the conductive material · CPC title

• H05K2201/0999

  Circuit printed on or in housing, e.g. housing as PCB; Circuit printed on the case of a component; PCB affixed to housing · CPC title

• H05K2203/107

  Using laser light · CPC title

• G05B19/4097

  characterised by using design data to control NC machines, e.g. CAD/CAM (G05B19/4093 takes precedence) · CPC title

• H05K1/0275

  Security details, e.g. tampering prevention or detection · CPC title