Image detection module and information management system

Patent metadata

Field	Value
Publication number	US-12557407-B2
Application number	US-202418644613-A
Country	US
Kind code	B2
Filing date	Apr 24, 2024
Priority date	May 18, 2017
Publication date	Feb 17, 2026
Grant date	Feb 17, 2026

Abstract

Environmental information is managed by a neural network.
An image detection module includes a first neural network, a first communication module, a first position sensor, a first processor, and a passive element. The first neural network includes an imaging device. The imaging device has a function of obtaining an image, and the first position sensor has a function of detecting positional information on where the image is obtained. When the first neural network determines whether the image has learned features, the first processor can transmit the positional information on where the image is obtained. The first processor receives a detection result through the first communication module, and the first processor can operate the passive element in accordance with the detection result.

First claim

The invention claimed is:

1 . A semiconductor device comprising:
a plurality of pixels, each including a first transistor, a second transistor, a first capacitor, a second capacitor, and a photodiode, wherein a gate of the first transistor is electrically connected to the photodiode, and to one electrode of the first capacitor, wherein the other electrode of the first capacitor is electrically connected to one electrode of the second capacitor, and to one of a source and a drain of the second transistor, wherein the gate of the first transistor retains a charge corresponding to a photocurrent generated by the photodiode, wherein a data potential for learning is supplied to the other of the source and the drain of the second transistor, wherein a potential corresponding to a weight coefficient is supplied to the other electrode of the second capacitor, and wherein an oxide semiconductor layer includes a channel formation region of the second transistor.

2 . The semiconductor device according to claim 1 , wherein the semiconductor device is an image detection module.

3 . The semiconductor device according to claim 1 , wherein the photodiode is provided to overlap the first transistor and the second transistor.

4 . The semiconductor device according to claim 1 , wherein a silicon layer incudes a channel formation region of the first transistor.

5 . A semiconductor device comprising:
a plurality of pixels configured to serve as a neuron and an imaging device, wherein each of the plurality of pixels includes a first transistor, a second transistor, a first capacitor, a second capacitor, and a photodiode, wherein a gate of the first transistor is electrically connected to the photodiode, and to one electrode of the first capacitor, wherein the other electrode of the first capacitor is electrically connected to one electrode of the second capacitor, and to one of a source and a drain of the second transistor, wherein the gate of the first transistor retains a charge corresponding to a photocurrent generated by the photodiode, wherein a data potential for learning is supplied to the other of the source and the drain of the second transistor, wherein a potential corresponding to a weight coefficient is supplied to the other electrode of the second capacitor, and wherein an oxide semiconductor layer includes a channel formation region of the second transistor.

6 . The semiconductor device according to claim 5 , wherein the semiconductor device is an image detection module.

7 . The semiconductor device according to claim 5 , wherein the photodiode is provided to overlap the first transistor and the second transistor.

8 . The semiconductor device according to claim 5 , wherein a silicon layer incudes a channel formation region of the first transistor.

Assignees

• Semiconductor Energy Lab

Inventors

• Fukutome Takahiro
• Godo Hiromichi

Classifications

• G06V10/95

  structured as a network, e.g. client-server architectures · CPC title

• G06V10/454

  Integrating the filters into a hierarchical structure, e.g. convolutional neural networks [CNN] · CPC title

• G06V10/82

  using neural networks · CPC title

• H04N25/77

  Pixel circuitry, e.g. memories, A/D converters, pixel amplifiers, shared circuits or shared components · CPC title

• G06F18/214

  Generating training patterns; Bootstrap methods, e.g. bagging or boosting · CPC title