Imaging device and camera system

Patent metadata

Field	Value
Publication number	US-10375362-B2
Application number	US-201815876262-A
Country	US
Kind code	B2
Filing date	Jan 22, 2018
Priority date	Feb 3, 2017
Publication date	Aug 6, 2019
Grant date	Aug 6, 2019

Abstract

An imaging device includes: a pixel array including first and second pixels, each pixel including a photoelectric converter converting light into charge and a detection circuit detecting the charge; a first voltage supply circuit supplying a first voltage to the first pixel such that an electric potential of the first electrode is set to a first electric potential at a point of time at which a charge accumulation period for the first pixel starts; a second voltage supply circuit supplying a second voltage to the second pixel such that an electric potential of the first electrode of the second pixel is set to a second electric potential different from the first electric potential at a point of time at which a charge accumulation period for the second pixel starts; and an addition circuit adding together signals generated in the first and second pixels.

First claim

What is claimed is:

1. An imaging device comprising:
a pixel array including a plurality of pixels including a first pixel and a second pixel, each pixel including a photoelectric converter that converts light into charge and a detection circuit that detects the charge, the photoelectric converter including a first electrode, a second electrode facing the first electrode, and a photoelectric conversion layer between the first electrode and the second electrode;
a first voltage supply circuit that supplies a first voltage to the first pixel such that an electric potential of the first electrode is set to a first electric potential at a point of time at which a charge accumulation period for the first pixel starts;
a second voltage supply circuit that supplies a second voltage to the second pixel such that an electric potential of the first electrode of the second pixel is set to a second electric potential different from the first electric potential at a point of time at which a charge accumulation period for the second pixel starts; and
an addition circuit that adds together a signal generated in the first pixel and a signal generated in the second pixel.

2. The imaging device according to claim 1 , wherein
the addition circuit includes a vertical signal line that is connected to both the first pixel and the second pixel, and
the addition circuit adds together a signal output from the first pixel and a signal output from the second pixel.

3. The imaging device according to claim 1 , wherein
each of the plurality of pixels includes a charge accumulation element that accumulates the charge generated in the photoelectric converter, and
the addition circuit includes an interconnection line that connects the charge accumulation element of the first pixel to the charge accumulation element of the second pixel.

4. The imaging device according to claim 1 , wherein
the addition circuit includes
a first vertical signal line that is connected to the first pixel and that transmits a signal output from the first pixel,
a second vertical signal line that is connected to the second pixel and that transmits a signal output from the second pixel, and
an interconnection line that connects the first vertical signal line to the second vertical signal line.

5. The imaging device according to claim 1 , wherein an electric potential difference between the first electrode and the second electrode of the first pixel at the point of time at which the charge accumulation period for the first pixel starts is different from an electric potential difference between the first electrode and the second electrode of the second pixel at the point of time at which the charge accumulation period for the second pixel starts.

6. The imaging device according to claim 1 , wherein
the pixel array includes a first pixel block that includes a first pixel group including the first pixel and a second pixel group including the second pixel, pixels belonging to the first pixel group being different from pixels belonging to the second pixel group, and
the addition circuit adds together signals respectively output from the pixels belonging to the first pixel group and adds together signals respectively output from the pixels belonging to the second pixel group.

7. The imaging device according to claim 6 , further comprising a subtraction circuit that subtracts the sum of the signals respectively output from the pixels belonging to the second pixel group from the sum of the signals respectively output from the pixels belonging to the first pixel group.

8. The imaging device according to claim 6 , wherein
the pixels belonging to the first pixel group are arranged in a first pattern and the pixels belonging to the second pixel group are arranged in a second pattern,
the pixel array includes a second pixel block different from the first pixel block, the second pixel block including a third pixel group including pixels arranged in the first pattern and a fourth pixel group including pixels arranged in the second pattern, and
the addition circuit adds together signals respectively output from the pixels belonging to the third pixel group and adds together signals respectively output from the pixels belonging to the fourth pixel group.

9. A camera system comprising:
the imaging device according to claim 1 ; and
a camera signal processor that processes an image signal output from the imaging device and outputs resultant image data.

10. The imaging device according to claim 1 , wherein
the detection circuit includes a transistor having a source and a drain, one of the source and the drain being connected to the first electrode,
the first voltage supply circuit supplies the first voltage to the other one of the source and the drain of the transistor of the first pixel in a reset period for the first pixel, and
the second voltage supply circuit supplies the second voltage different from the first voltage to the other one of the source and the drain of the transistor of the second pixel in a reset period for the second pixel.

11. The imaging device according to claim 1 , wherein
the detection circuit includes a capacitor, one end of the capacitor being connected to the first electrode,
the first voltage supply circuit supplies a first voltage to the other end of the capacitor in the charge accumulation period for the first pixel, and
the second voltage supply circuit supplies a second voltage different from the first voltage to the other end of the capacitor in the charge accumulation period for the second pixel.

12. The imaging device according to claim 1 , wherein the second electrode of the first pixel and the second electrode of the second pixel form a single continuous electrode.

Assignees

• Panasonic Ip Man Co Ltd

Inventors

• Shishido Sanshiro

Classifications

• H04N25/76 Primary

  Addressed sensors, e.g. MOS or CMOS sensors · CPC title

• H04N25/46 Primary

  by combining or binning pixels · CPC title

• H04N25/00 Primary

  Circuitry of solid-state image sensors [SSIS]; Control thereof · CPC title

• H04N2209/042

  having a single pick-up sensor · CPC title

• H04N5/347

  Electricity · mapped topic