Current sensor for a printed circuit board
US-2024237215-A1 · Jul 11, 2024 · US
US12557207B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-12557207-B2 |
| Application number | US-202318326672-A |
| Country | US |
| Kind code | B2 |
| Filing date | May 31, 2023 |
| Priority date | Jul 20, 2021 |
| Publication date | Feb 17, 2026 |
| Grant date | Feb 17, 2026 |
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Official abstract text for this publication.
A multi-layer coating on an outer surface of a substrate includes a first layer applied directly to the outer surface of the substrate. The first layer includes diamond-like carbon (DLC) configured to mitigate metal whisker formation. A second layer is applied on a top surface of the first layer. The second layer is a conformal coating that includes a second material configured to bind to the top surface of the first layer and fill any microfractures that may form in the first layer. Optionally, a third layer is applied on a top surface of the second layer and includes DLC configured to protect the second layer from oxidation and degradation.
Opening claim text (preview).
Having thus described various embodiments of the invention, what is claimed as new and desired to be protected by Letters Patent includes the following: 1 . A multi-layer coating disposed on an outer surface of a non-conductive substrate, the multi-layer coating comprising: at least one diamond-like carbon (DLC) layer applied externally to the outer surface of the non-conductive substrate, wherein the at least one DLC layer is doped with a softening dopant; at least one metallization layer applied on an outer surface of the at least one DLC layer, wherein the at least one metallization layer is configured to provide electromagnetic shielding and environmental protection to the at least one DLC layer and the non-conductive substrate; and a subsequent DLC layer disposed on an outer surface of the at least one metallization layer. 2 . The multi-layer coating of claim 1 , further comprising: at least one conformal coating layer disposed on an outer surface of an outermost metallization layer, wherein the at least one conformal coating layer prevents oxidation of the outermost metallization layer. 3 . The multi-layer coating of claim 1 , wherein the at least one metallization layer is configured to electrically ground one or more electrical signals. 4 . The multi-layer coating of claim 1 , wherein the at least one metallization layer comprises a plurality of metallization layers. 5 . The multi-layer coating of claim 4 , the plurality of metallization layers comprising: a first metallization layer comprising a first metal material; and a second metallization layer comprising a second metal material that is distinct from the first metal material. 6 . The multi-layer coating of claim 5 , the plurality of metallization layers further comprising: a third metallization layer comprising a third metal material that is distinct from the first metal material and the second metal material. 7 . The multi-layer coating of claim 6 , wherein each of the first metallization layer, the second metallization layer, and the third metallization layer has a thickness of less than 5 microns. 8 . The multi-layer coating of claim 1 , wherein the non-conductive substrate comprises a non-conductive polyurethane substrate. 9 . The multi-layer coating of claim 1 , wherein the subsequent DLC layer prevents oxidation of the at least one metallization layer. 10 . A substrate comprising a multi-layer coating disposed on an outer surface thereof, the multi-layer coating comprising: at least one Plasma Vapor Deposition (PVD) layer applied externally to the outer surface of the substrate, wherein the at least one PVD layer is doped with a softening dopant; and at least one metallization layer applied on an outer surface of the at least one PVD layer, wherein the at least one metallization layer is configured to provide electromagnetic shielding and environmental protection to the substrate, wherein the substrate comprises a non-conductive polymer substrate. 11 . The substrate of claim 10 , wherein the softening dopant comprises silicon. 12 . The substrate of claim 10 , wherein the at least one metallization layer comprises a copper material. 13 . The substrate of claim 10 , wherein the at least one metallization layer comprises an aluminum material. 14 . The substrate of claim 10 , wherein the at least one metallization layer comprises a titanium material. 15 . The substrate of claim 10 , wherein the at least one metallization layer comprises a metal alloy material. 16 . An electronic device comprising: an electronic component comprising an outer surface; and a multi-layer coating disposed on the outer surface of the electronic component, the multi-layer coating comprising: at least one diamond-like carbon (DLC) layer applied externally to the outer surface of the electronic component, wherein the at least one DLC layer is doped with a softening dopant; at least one metallization layer applied on an outer surface of the at least one DLC layer, wherein the at least one metallization layer is configured to provide electromagnetic shielding and environmental protection to the electronic component; and a subsequent DLC layer disposed on an outer surface of the at least one metallization layer. 17 . The electronic device of claim 16 , wherein the multi-layer coating has an overall thickness of less than 20 microns. 18 . The electronic device of claim 16 , wherein the subsequent DLC layer prevents oxidation of the at least one metallization layer. 19 . The electronic device of claim 16 , wherein the at least one metallization layer is applied to the DLC layer using a vapor deposition process. 20 . The electronic device of claim 16 , wherein the DLC layer provides a seal to the outer surface of the electronic component and is configured to adhere to the at least one metallization layer.
provided by an outer layer of PCB · CPC title
Inorganic, non-metallic layer, e.g. resist or dielectric for printed capacitor · CPC title
Anti metal-migration, e.g. avoiding tin whisker growth · CPC title
for inhibiting the corrosion of the circuit, e.g. for preserving the solderability · CPC title
by printed shielding conductors, ground planes or power plane (H05K1/0236 takes precedence) · CPC title
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