Display substrate and display device

Patent metadata

Field	Value
Publication number	US-12531019-B2
Application number	US-202318696852-A
Country	US
Kind code	B2
Filing date	May 30, 2023
Priority date	May 30, 2023
Publication date	Jan 20, 2026
Grant date	Jan 20, 2026

Abstract

A display substrate and a display device. The display substrate includes a base substrate and a plurality of sub-pixels arranged on the base substrate. A plurality of sub-pixel driving circuitries in the plurality of sub-pixels is arranged in columns, the columns of sub-pixel driving circuitries are divided into a plurality of column units, and each column unit includes at least two adjacent columns of sub-pixel driving circuitries. The display substrate further includes a first initialization signal transmission layer including a first initialization bus and a plurality of first initialization branches. The first initialization branch includes a first branch body member and a plurality of first branch extending members. The first branch body member is coupled to the sub-pixel driving circuitries in a corresponding column unit through the plurality of first branch extending members.

First claim

What is claimed is:

1 . A display substrate, comprising a base substrate and a plurality of sub-pixels arranged on the base substrate, wherein the sub-pixel comprises a sub-pixel driving circuitry, the plurality of sub-pixel driving circuitries of the plurality of sub-pixels is arranged in columns along a first direction, the sub-pixel driving circuitries in each column comprise a plurality of sub-pixel driving circuitries arranged along a second direction, the first direction intersects with the second direction, the plurality of columns of sub-pixel driving circuitries is divided into a plurality of column units, and the column unit comprises at least two adjacent columns of sub-pixel driving circuitries,
wherein the display substrate further comprises a first initialization signal transmission layer comprising a first initialization bus and a plurality of first initialization branches coupled to the first initialization bus, the first initialization branch comprises a first branch body member and a plurality of first branch extending members, the first branch body member comprises at least a portion extending along the second direction, the first branch extending member comprises at least a portion extending along the first direction, and the first branch body member is coupled to the sub-pixel driving circuitries in a corresponding column unit through the plurality of first branch extending members respectively; wherein the sub-pixel driving circuitries in the column unit are divided into a plurality of row units arranged along the second direction, the row unit comprises at least two sub-pixel driving circuitries arranged along the first direction, and the first branch extending member is coupled to the sub-pixel driving circuitries in a corresponding row unit; wherein the first branch extending member comprises a first extending sub-member and a second extending sub-member, the first extending sub-member is located at a first side of the first branch body member and coupled to the sub-pixel driving circuitries located at the first side of the first branch body member in the corresponding row unit, the second extending sub-member is located at a second side of the first branch body member and coupled to the sub-pixel driving circuitries located at the second side of the first branch body member in the corresponding row unit, and the first side is opposite to the second side along the first direction.

2 . The display substrate according to claim 1 , wherein the first branch extending members are located at a same side of the first branch body member along the first direction, and the first branch extending member is coupled to the sub-pixel driving circuitries located at the same side in the corresponding row unit.

3 . The display substrate according to claim 1 , further comprising a second scanning line, wherein the sub-pixel driving circuitry comprises a driving transistor and a third resetting transistor, a gate electrode of the third resetting transistor is coupled to the corresponding second scanning line, a second electrode of the third resetting transistor is coupled to a first electrode of the driving transistor, the first extending sub-member is coupled to a first electrode of the third resetting transistor in a corresponding sub-pixel driving circuitry, and the second extending sub-member is coupled to a first electrode of the third resetting transistor in a corresponding sub-pixel driving circuitry.

4 . The display substrate according to claim 3 , wherein the third resetting transistor comprises a third resetting active layer, an orthogonal projection of a first end of the first extending sub-member onto the base substrate is spaced apart from an orthogonal projection of the third resetting active layer coupled to the first extending sub-member and arranged closest to the first branch body member onto the base substrate by a first distance along the first direction, and the first end is an end of the first extending sub-member close to the first branch body member coupled to the first extending sub-member,
wherein an orthogonal projection of a first end of the second extending sub-member onto the base substrate is spaced apart from an orthogonal projection of the third resetting active layer coupled to the second extending sub-member and arranged closest to the first branch body member onto the base substrate by a second distance along the first direction, the first end is an end of the second extending sub-member close to the first branch body member coupled to the second extending sub-member, and the first distance is less than the second distance.

5 . The display substrate according to claim 3 , wherein an orthogonal projection of the first extending sub-member onto the base substrate does not overlap with an orthogonal projection of the second scanning line onto the base substrate; and/or an orthogonal projection of the second extending sub-member onto the base substrate partially overlaps with the orthogonal projection of the second scanning line onto the base substrate.

6 . The display substrate according to claim 3 , further comprising a second initialization signal line, wherein the sub-pixel comprises a light-emitting element, the sub-pixel driving circuitry comprises a second resetting transistor, a gate electrode of the second resetting transistor is coupled to a corresponding second scanning line, a first electrode of the second resetting transistor is coupled to the second initialization signal line, and a second electrode of the second resetting transistor is coupled to the light-emitting element,
wherein the orthogonal projection of the first extending sub-member onto the base substrate at least partially overlaps with an orthogonal projection of the second initialization signal line onto the base substrate; and/or the orthogonal projection of the second extending sub-member onto the base substrate at least partially overlaps with the orthogonal projection of the second initialization signal line onto the base substrate.

7 . The display substrate according to claim 1 , further comprising a second scanning line, wherein the sub-pixel comprises a light-emitting element, the sub-pixel driving circuitry comprises a second resetting transistor, a gate electrode of the second resetting transistor is coupled to a corresponding second scanning line, and a second electrode of the second resetting transistor is coupled to the light-emitting element,
wherein the first extending sub-member is coupled to a first electrode of the second resetting transistor in a corresponding sub-pixel driving circuitry, and the second extending sub-member is coupled to a first electrode of the second resetting transistor in a corresponding sub-pixel driving circuitry, wherein the second resetting transistor comprises a second resetting active layer, an orthogonal projection of a first end of the first extending sub-member onto the base substrate is spaced apart from an orthogonal projection of the second resetting active layer coupled to the first extending sub-member and arranged closest to the first branch body member onto the base substrate by a third distance along the first direction, and the first end is an end of the first extending sub-member close to the first branch body member coupled to the first extending sub-member, wherein an orthogonal projection of a first end of the second extending sub-member onto the base substrate is spaced apart from an orthogonal projection of the second resetting active layer coupled to the second extending sub-member and arranged closest to the first branch body member onto the base substrate by a fourth distance along the first direction, the first end is an end of the second extending sub-member close to the first branch body member cou

Assignees

• Chengdu Boe Optoelect Tech Co
• Boe Technology Group Co Ltd

Inventors

• Cao Dan
• Gao Wenhui
• Wang Miao
• Liu Cong
• Wang Binyan
• Zhang Jingwen
• Guo Yonglin
• Song Gukhwan
• Liu Zhen

Classifications

• G09G2320/0247

  Flicker reduction other than flicker reduction circuits used for single beam cathode-ray tubes · CPC title

• G09G2300/0426

  Layout of electrodes and connections · CPC title

• G09G3/3233

  with pixel circuitry controlling the current through the light-emitting element · CPC title

• H10K59/131

  Interconnections, e.g. wiring lines or terminals · CPC title

• H10K59/12

  Active-matrix OLED [AMOLED] displays · CPC title