Anodized film substrate base, anodized film substrate part having same, anodized film-based interposer having same, and semiconductor package having same

US12506091B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-12506091-B2
Application numberUS-202118015711-A
CountryUS
Kind codeB2
Filing dateJul 27, 2021
Priority dateJul 29, 2020
Publication dateDec 23, 2025
Grant dateDec 23, 2025

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

The present invention relates to an anodized film substrate base made of an anodized oxide film, an anodized film substrate part including a vertical conductive part provided inside the anodized film substrate base, an anodized film-based interposer having same, and a semiconductor package having same.

First claim

Opening claim text (preview).

What is claimed is: 1 . A semiconductor package, comprising: a semiconductor chip; and an anodized film-based interposer on which the semiconductor chip is mounted, wherein the anodized film-based interposer comprises: an anodized film substrate made of an anodized film and comprising a vertical conductive part provided therein; and a redistribution part, wherein the anodized film comprises a porous layer having a pore formed therein and a barrier layer sealing one end of the pore, and wherein the redistribution part is provided on an upper surface of the barrier layer. 2 . The semiconductor package of claim 1 , wherein a package substrate is provided under the anodized film-based interposer, and the anodized film-based interposer is interposed between the semiconductor chip and the package substrate. 3 . An anodized film-based interposer, comprising: an anodized film substrate, comprising a vertical conductive part provided in an anodized film substrate base made of an anodized film; and a redistribution part, provided on at least one surface of the anodized film substrate, wherein the anodized film comprises a porous layer having a pore formed therein and a barrier layer sealing one end of the pore, and wherein the redistribution part is provided on an upper surface of the barrier layer. 4 . An anodized film substrate, comprising: an anodized film substrate base, made of an anodized film and having a pore formed therein during an anodizing; a vertical conductive part, provided in the anodized film substrate base; and a barrier layer formed during the anodizing on at least one surface of the anodized film substrate base to seal one end of the pore. 5 . The anodized film substrate of claim 4 , further comprising a support substrate provided on at least one surface of the anodized film substrate base. 6 . The anodized film substrate of claim 4 , wherein the vertical conductive part is provided in a through hole formed by etching the anodized film to have a larger size than a pore formed during anodizing. 7 . The anodized film substrate of claim 4 , wherein the vertical conductive part is provided in a pore formed during anodizing. 8 . The anodized film substrate of claim 6 , further comprising a clearance formed between the through hole and the vertical conductive part. 9 . The anodized film substrate of claim 4 , wherein the vertical conductive part comprises a main conductive part and a buffer part being in contact with the main conductive part. 10 . The anodized film substrate of claim 4 , further comprising a via-connection pad formed on the anodized film substrate base and being in contact with the vertical conductive part, wherein one of the via-connection pads is connected to a plurality of the vertical conductive parts. 11 . The anodized film substrate of claim 4 , further comprising a depression formed by removing at least a portion of the anodized film. 12 . An anodized film substrate base, made of an anodized film formed by anodizing a base metal and then removing the base metal, the anodized film substrate base comprising a through hole formed by etching the anodized film to have a larger size than a pore formed during the anodizing, wherein a sealed end of the pore is unsealed by removing a barrier layer formed on at least one surface side of the anodized film substrate base during the anodizing. 13 . The anodized film substrate base of claim 12 , further comprising a depression formed by removing at least a portion of the anodized film. 14 . The anodized film substrate base of claim 12 , wherein the through hole has a polygonal cross-section. 15 . An anodized film substrate base, made of an anodized film formed by anodizing a base metal and then removing the base metal, the anodized film substrate base comprising: a through hole formed by etching the anodized film to have a larger size than a pore formed during the anodizing; and a barrier layer formed on at least one surface side of the anodized film substrate base during the anodizing to seal one end of the pore. 16 . The anodized film substrate base of claim 12 , further comprising a support substrate provided on at least one surface of the anodized film substrate base. 17 . The anodized film substrate base of claim 15 , further comprising a depression formed by removing at least a portion of the anodized film.

Assignees

Inventors

Classifications

  • characterised by the through-semiconductor vias [TSVs] in the stacked chips · CPC title

  • the stacked chips having different sizes, e.g. chip stacks having a pyramidal shape · CPC title

  • on active surfaces of flip-chip devices, e.g. underfills · CPC title

  • Package configurations · CPC title

  • between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

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What does patent US12506091B2 cover?
The present invention relates to an anodized film substrate base made of an anodized oxide film, an anodized film substrate part including a vertical conductive part provided inside the anodized film substrate base, an anodized film-based interposer having same, and a semiconductor package having same.
Who is the assignee on this patent?
Point Engineering Co Ltd
What technology area does this patent fall under?
Primary CPC classification H10W20/43. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Dec 23 2025 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 2 related publications on this page (citations in our corpus or others sharing the same primary CPC).