Thin-film transistor and preparation method therefor, and display substrate and display panel

US12501719B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-12501719-B2
Application numberUS-202017905246-A
CountryUS
Kind codeB2
Filing dateMar 19, 2020
Priority dateMar 19, 2020
Publication dateDec 16, 2025
Grant dateDec 16, 2025

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

Disclosed are a thin-film transistor and a preparation method therefor, and a display substrate and a display panel. The thin-film transistor includes: a base substrate; an active layer located on the base substrate; and a source-drain electrode which is located on the side of the active layer facing away from the base substrate, and includes an electrode layer and a protective layer, where the material of the electrode layer includes a first metal element; the protective layer covers the surface of the side of the electrode layer facing away from the base substrate, and a side face of the electrode layer; and the material of the protective layer is an oxide of the first metal element.

First claim

Opening claim text (preview).

What is claimed is: 1 . A thin-film transistor, comprising: a base substrate; an active layer arranged on the base substrate; and a source-drain electrode layer, which is arranged on a side, facing away from the base substrate, of the active layer, and comprises an electrode layer, a transition layer arranged between the active layer and the electrode layer, and a protective layer, wherein a material of the electrode layer comprises a first metal element, and a mass percentage of the first metal element in the electrode layer is less than 0.5 wt. %; the protective layer covers a surface of a side, facing away from the base substrate, of the electrode layer, and a side face of the electrode layer; a material of the protective layer is an oxide of the first metal element; an orthographic projection of the transition layer on the base substrate overlaps with an orthographic projection of the electrode layer on the base substrate. 2 . The thin-film transistor according to claim 1 , wherein the protective layer further covers a side face of the transition layer. 3 . The thin-film transistor according to claim 1 , wherein the electrode layer is made of an alloy material; and the alloy material comprises the first metal element. 4 . The thin-film transistor according to claim 3 , wherein the material of the electrode layer comprises a copper alloy. 5 . The thin-film transistor according to claim 4 , wherein the first metal element is an aluminum element; and the material of the protective layer comprises aluminum oxide. 6 . The thin-film transistor according to claim 4 , wherein the first metal element is a chromium element; and the material of the protective layer comprises chromium oxide. 7 . The thin-film transistor according to claim 1 , wherein a ratio of a thickness of the protective layer to a thickness of the electrode layer ranges from 1/20 to 1/200. 8 . The thin-film transistor according to claim 1 , wherein the active layer comprises: an undamaged layer close to the base substrate and a damaged layer far away from the base substrate; wherein an orthographic projection of the damaged layer on the base substrate does not overlap with an orthographic projection of a channel region of the thin-film transistor on the base substrate. 9 . The thin-film transistor according to claim 8 , wherein the orthographic projection of the damaged layer on the base substrate is on two sides of the orthographic projection of the channel region of the thin-film transistor on the base substrate. 10 . A display substrate, comprising the thin-film transistor according to claim 1 . 11 . A display panel, comprising the display substrate according to claim 10 . 12 . A preparation method for the thin-film transistor according to claim 1 , comprising: preparing and forming the active layer on the base substrate; sequentially depositing a transition layer and the electrode layer of the source-drain electrode layer on the active layer, wherein the electrode layer comprises the first metal element; patterning the transition layer and the electrode layer by a patterning process to form a pattern of the source-drain electrode layer; and oxidizing the source-drain electrode layer for forming a layer of an oxide film of the first metal element on a surface of the electrode layer. 13 . The preparation method according to claim 12 , wherein the electrode layer is made of a copper alloy, and the first metal element is aluminum or chromium; wherein the oxidizing the source-drain electrode layer for forming the layer of the oxide film of the first metal element on the surface of the electrode layer specifically comprises: performing thermal annealing treatment on the electrode layer at an annealing temperature of higher than or equal to 300° C. for an annealing time of greater than or equal to 1 h under an atmosphere of air, for forming a layer of aluminum oxide film or chromium oxide film on the surface of the electrode layer. 14 . The preparation method according to claim 12 , wherein the sequentially depositing the transition layer and the electrode layer of the source-drain electrode layer on the active layer specifically comprises: sequentially depositing the transition layer and the electrode layer by using a plasma sputtering deposition process while forming a damage layer on an upper surface of the active layer; wherein the patterning the transition layer and the electrode layer by the patterning process to form the pattern of the source-drain electrode layer specifically comprises: etching the transition layer and the electrode layer by an etching solution for an etch time of greater than or equal to (EPD+A/B), wherein EPD is a time required for the transition layer and the electrode layer to be etched exactly, A is a depth of a damaged layer in the active layer, and B is an etching rate of the damaged layer in the active layer by the etching solution.

Assignees

Inventors

Classifications

  • Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass · CPC title

  • the material containing aluminium, e.g. Al2O3 · CPC title

  • characterised by the metal · CPC title

  • of a metallic layer · CPC title

  • Oxide semiconductors, e.g. zinc oxide, copper aluminium oxide or cadmium stannate · CPC title

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What does patent US12501719B2 cover?
Disclosed are a thin-film transistor and a preparation method therefor, and a display substrate and a display panel. The thin-film transistor includes: a base substrate; an active layer located on the base substrate; and a source-drain electrode which is located on the side of the active layer facing away from the base substrate, and includes an electrode layer and a protective layer, where the…
Who is the assignee on this patent?
Fuzhou Boe Optoelectronics Tech Co Ltd, Boe Technology Group Co Ltd, Beijing Boe Technology Dev Co Ltd
What technology area does this patent fall under?
Primary CPC classification H10D99/00. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Dec 16 2025 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 9 related publications on this page (citations in our corpus or others sharing the same primary CPC).