Line drive signal enhancement circuit, shift register unit and display panel

Patent metadata

Field	Value
Publication number	US-12469453-B2
Application number	US-202418762797-A
Country	US
Kind code	B2
Filing date	Jul 3, 2024
Priority date	May 31, 2021
Publication date	Nov 11, 2025
Grant date	Nov 11, 2025

Abstract

The line drive signal enhancement circuit includes a first control unit, a second control unit, a first output unit and a second output unit. The first control unit is used for outputting the first power supply voltage to the first node or the second node under the control of the first control terminal and the second control terminal. The second control unit is used for outputting the second power supply voltage to the second node in response to the first power supply voltage on the first node, and is further used for outputting the second power supply voltage to the first node in response to the first power supply voltage on the second node.

First claim

The invention claimed is:

1 . A display panel, comprising a shift register unit, the shift register unit comprising a shift register, an inverter and a line drive signal enhancement circuit,
wherein the line drive signal enhancement circuit comprises: a control unit, having a first control terminal and a second control terminal, for inputting a first power supply voltage to one of a first node and a second node, and inputting a second power supply voltage to the other of the first node and the second node, under the control of the first control terminal and the second control terminal; wherein the shift register is used for outputting an initial scan signal to an input terminal of the inverter and the first control terminal of the line drive signal enhancement circuit; and an output terminal of the inverter is connected to the second control terminal of the line drive signal enhancement circuit.

2 . The display panel according to claim 1 , wherein the line drive signal enhancement circuit further comprises:
a first output unit, connected to the first node and the first output terminal, for outputting one of the first power supply voltage and the second power supply voltage to the first output terminal under the control of the first node; a second output unit, connected to the second node and the second output terminal, for outputting the other of the first power supply voltage and the second power supply voltage to the second output terminal under the control of the second node.

3 . The display panel according to claim 2 ,
wherein the first output unit comprises: a seventh transistor, having a control terminal connected to the first node, a first terminal for loading the first power supply voltage, and a second terminal serving as the first output terminal; an eighth transistor, having a control terminal connected to the first node, a first terminal for loading the first power supply voltage, and a second terminal connected to the first output terminal; a ninth transistor, having a control terminal connected to the first node, a first terminal for loading the second power supply voltage, and a second terminal connected to the first output terminal; and a tenth transistor, having a control terminal connected to the first node, a first terminal for loading the second power supply voltage, and a second terminal connected to the first output terminal.

4 . The display panel according to claim 2 , wherein the second output unit comprises:
an eleventh transistor, having a control terminal connected to the second node, a first terminal for loading the second power supply voltage, and a second terminal serving as the first output terminal; a twelfth transistor, having a control terminal connected to the second node, a first terminal for loading the second power supply voltage, and a second terminal connected to the second output terminal; a thirteenth transistor, having a control terminal connected to the second node, a first terminal for loading the first power supply voltage, and a second terminal connected to the second output terminal; and a fourteenth transistor, having a control terminal connected to the second node, a first terminal for loading the first power supply voltage, and a second terminal connected to the second output terminal, wherein each of the seventh transistor, the eighth transistor, the thirteenth transistor, and the fourteenth transistor is turned on in response to one of the first power supply voltage and the second power supply voltage applied to the control terminal thereof, and wherein each of the ninth transistor, the tenth transistor, the eleventh transistor, and the twelfth transistor is turned on in response to the other of the first power supply voltage and the second power supply voltage applied to the control terminal thereof.

5 . The display panel according to claim 1 , wherein the control unit comprises:
a first control unit, having the first control terminal and the second control terminal, for outputting the first power supply voltage to the first node or the second node under the control of the first control terminal and the second control terminal; a second control unit, connected to the first node and the second node, for outputting the second power supply voltage to the second node in response to the first power supply voltage applied to the first node, and for outputting the second power supply voltage to the first node in response to the first power supply voltage applied to the second node.

6 . The display panel according to claim 5 , wherein the second control unit has at least four transistors.

7 . The display panel according to claim 5 , wherein the first control unit comprises:
a first transistor, having a first terminal for loading the first power supply voltage, a second terminal connected to the first node, and a control terminal serving as the first control terminal, wherein the first transistor is used for outputting the first power supply voltage to the first node under the control of the control terminal of the first transistor; and a second transistor, having a first terminal for loading the first power supply voltage, a second terminal connected to the second node, and a control terminal serving as the second control terminal, wherein the second transistor is used for outputting the first power supply voltage to the second node under the control of the control terminal of the second transistor, wherein the first transistor and the second transistor are of the same type.

8 . The display panel according to claim 5 , wherein the second control unit comprises:
a third transistor, having a control terminal connected to the first node, a first terminal for loading the second power supply voltage, and a second terminal connected to the second node, wherein the third transistor is used for outputting the second power supply voltage to the second node under the control of the first power supply voltage loaded to the first node; a fourth transistor, having a control terminal connected to the first node, a first terminal for loading the second power supply voltage, and a second terminal connected to the second node, wherein the fourth transistor is used for outputting the second power supply voltage to the second node under the control of the first power supply voltage loaded to the first node; a fifth transistor, having a control terminal connected to the second node, a first terminal for loading the second power supply voltage, and a second terminal connected to the first node, wherein the fifth transistor is used for outputting the second power supply voltage to the first node under the control of the first power supply voltage loaded to the second node; and a sixth transistor, having a control terminal connected to the second node, a first terminal for loading the second power supply voltage, and a second terminal connected to the first node, wherein the sixth transistor is used for outputting the second power supply voltage to the first node under the control of the first power supply voltage loaded to the second node.

9 . The display panel according to claim 8 , wherein
the third transistor, the fourth transistor, the fifth transistor, and the sixth transistor are of the same type.

10 . A display panel, wherein
the display panel comprises a driving backplane, wherein the driving backplane comprises a semiconductor substrate, a gate insulation layer, a gate layer, an insulation medium layer, and a metal wiring layer, the display panel comprises a display area and a peripheral area surrounding the display area, and a plurality of line drive signal enhancement areas is arranged in the peripheral area; in each of the line drive

Assignees

• Boe Technology Group Co Ltd

Inventors

• Li Dongsheng
• Fan Longfei
• Wu Qian

Classifications

• G09G2330/021

  Power management, e.g. power saving · CPC title

• G09G2310/0286

  Details of a shift registers arranged for use in a driving circuit · CPC title

• G09G2300/0842

  forming a memory circuit, e.g. a dynamic memory with one capacitor · CPC title

• G09G2300/0426

  Layout of electrodes and connections · CPC title

• G09G3/3677

  suitable for active matrices only · CPC title