Power supply circuit, driving method for the same and display device

Patent metadata

Field	Value
Publication number	US-10140917-B2
Application number	US-201615220991-A
Country	US
Kind code	B2
Filing date	Jul 27, 2016
Priority date	Feb 19, 2016
Publication date	Nov 27, 2018
Grant date	Nov 27, 2018

Abstract

Provided are a power supply circuit, a driving method for the same, and a display device. The power supply circuit comprises a first control sub-circuit, a second control sub-circuit, a voltage converting sub-circuit, a first output sub-circuit, and a second output sub-circuit; the first control sub-circuit controls the first voltage level terminal to be connected to the first node, the second control sub-circuit controls the second voltage level terminal to be connected to the second node, the voltage converting sub-circuit adjusts the voltage at the first node and the voltage at the second node, the first output sub-circuit outputs the voltage at the first node to the first output terminal, the second output sub-circuit outputs the voltage at the second node to the second output terminal. Structure of the power supply circuit can be simplified, and thereby manufacturing cost of the power supply circuit can be reduced.

First claim

What is claimed is:

1. A power supply circuit, comprising:
a first control sub-circuit connected to a first voltage level terminal, a first scan signal terminal, and a first node, and configured to control the first voltage level terminal to be connected to the first node under control of a voltage at the first scan signal terminal;
a second control sub-circuit connected to a second voltage level terminal, a second scan signal terminal, and a second node, and configured to control the second voltage level terminal to be connected to the second node under control of a voltage at the second scan signal terminal;
a voltage converting sub-circuit connected to the first node and the second node, and configured to adjust a voltage at the first node and a voltage at the second node under control of the first control sub-circuit and the second control sub-circuit;
a first output sub-circuit connected to a third scan signal terminal, a first output terminal, and the first node, and configured to output the voltage at the first node to the first output terminal under control of a voltage at the third scan signal terminal; and
a second output sub-circuit connected to a fourth scan signal terminal, a second output terminal and the second node, and configured to output the voltage at the second node to the second output terminal, under control of voltage at the fourth scan signal terminal.

2. The power supply circuit according to claim 1 , wherein the first control sub-circuit comprises a first transistor,
a first terminal of the first transistor is connected to the first voltage level terminal, a second terminal thereof is connected to the first node, and a gate thereof is connected to the first scan signal terminal.

3. The power supply circuit according to claim 2 , wherein the second control sub-circuit comprises a second transistor,
a first terminal of the second transistor is connected to the second voltage level terminal, a second terminal thereof is connected to the second node, and a gate thereof is connected to the second scan signal terminal.

4. The power supply circuit according to claim 3 , wherein the first output sub-circuit comprises
a third transistor, a first terminal of the third transistor is connected to the first node, and a gate thereof is connected to the third scan signal terminal; and
a first diode, an anode of the first diode is connected to the first output terminal and a cathode thereof is connected to a second terminal of the third transistor.

5. The power supply circuit according to claim 4 , wherein the second output sub-circuit comprises:
a fourth transistor, a first terminal of the fourth transistor is connected to the second node and a gate thereof is connected to the fourth scan signal terminal; and
a second diode, a cathode of the second diode is connected to the second output terminal and an anode thereof is connected to a second terminal of the fourth transistor.

6. The power supply circuit according to claim 5 , wherein the voltage converting sub-circuit comprises an inductor, a first terminal of the inductor is connected to the first node and a second terminal thereof is connected to the second node.

7. The power supply circuit according to claim 6 , wherein each of the transistors is an N-type transistor.

8. The power supply circuit according to claim 6 , wherein each of the transistors is a P-type transistor.

9. A driving method for the power supply circuit according to claim 1 , comprising:
in a first stage, the first control sub-circuit connecting the first voltage level terminal to the first node under control of the voltage at the first scan signal terminal, the second control sub-circuit connecting the second voltage level terminal to the second node under control of the voltage of the second scan signal terminal, and the voltage converting sub-circuit storing electrical energy inputted through the first node;
in a second stage, the first control sub-circuit connecting the first voltage level terminal to the first node under control of the voltage at the first scan signal terminal, the second control sub-circuit disconnecting the second voltage level terminal from the second node under control of the voltage of the second scan signal terminal, the voltage converting sub-circuit adjusting the voltage at the second node through the stored electrical energy, and the second output sub-circuit outputting the voltage at the second node to the second output terminal under control of the voltage of the fourth scan signal terminal;
in a third stage, the first control sub-circuit connecting the first voltage level terminal to the first node under control of the voltage at the first scan signal terminal, the second control sub-circuit connecting the second voltage level terminal to the second node under control of the voltage of the second scan signal terminal, and the voltage converting sub-circuit storing electrical energy inputted through the first node;
in a fourth stage, the first control sub-circuit disconnecting the first voltage level terminal from the first node under control of the voltage at the first scan signal terminal, the second control sub-circuit connecting the second voltage level terminal to the second node under control of the voltage of the second scan signal terminal, the voltage converting sub-circuit adjusting the voltage at the first node through the stored electrical energy, and the first output sub-circuit outputting the voltage at the first node to the first output terminal under control of the voltage of the third scan signal terminal.

10. The driving method according to claim 9 , wherein the first control sub-circuit comprises a first transistor,
a first terminal of the first transistor is connected to the first voltage level terminal, a second terminal thereof is connected to the first node, and a gate thereof is connected to the first scan signal terminal.

11. The driving method according to claim 10 , wherein the second control sub-circuit comprises a second transistor,
a first terminal of the second transistor is connected to the second voltage level terminal, a second terminal thereof is connected to the second node, and a gate thereof is connected to the second scan signal terminal.

12. The driving method according to claim 11 , wherein the first output sub-circuit comprises:
a third transistor, a first terminal of the third transistor is connected to the first node, and a gate thereof is connected to the third scan signal terminal; and
a first diode, an anode of the first diode is connected to the first output terminal and a cathode thereof is connected to a second terminal of the third transistor.

13. The driving method according to claim 12 , wherein the second output sub-circuit comprises:
a fourth transistor, a first terminal of the fourth transistor is connected to the second node and a gate thereof is connected to the fourth scan signal terminal; and
a second diode, a cathode of the second diode is connected to the second output terminal and an anode thereof is connected to a second terminal of the fourth transistor.

14. The driving method according to claim 13 , wherein the voltage converting sub-circuit comprises an inductor, a first terminal of the inductor is connected to the first node and a second terminal thereof is connected to the second node.

15. The driving method according to claim 14 , wherein each of the transistors is an N-type transistor.

16. The driving method according to claim 14 , wherein each of the transistors is a P-type transistor.

17. A display device, comprising a

Assignees

• Boe Technology Group Co Ltd
• Ordos Yuansheng Optoelectronics Co Ltd

Inventors

• Zhang Chenggeng
• Zhang Boya

Classifications

• G09G2310/0289

  Details of voltage level shifters arranged for use in a driving circuit · CPC title

• G09G2330/028

  Generation of voltages supplied to electrode drivers in a matrix display other than LCD · CPC title

• G09G3/3225 Primary

  using an active matrix · CPC title

• G09G2330/02

  Details of power systems and of start or stop of display operation · CPC title

• H05B45/60 Primary

  Circuit arrangements for operating LEDs comprising organic material, e.g. for operating organic light-emitting diodes [OLED] or polymer light-emitting diodes [PLED] · CPC title