Methods for activity-based memory maintenance operations and memory devices and systems employing the same

Patent metadata

Field	Value
Publication number	US-12468589-B2
Application number	US-202418591922-A
Country	US
Kind code	B2
Filing date	Feb 29, 2024
Priority date	Dec 21, 2018
Publication date	Nov 11, 2025
Grant date	Nov 11, 2025

Abstract

Memory devices and methods of operating memory devices in which maintenance operations can be scheduled on an as-needed basis for those memory portions where activity (e.g., operations in excess of a predetermined threshold) warrants a maintenance operation are disclosed. In one embodiment, an apparatus comprises a memory including a memory location, and circuitry configured to determine a count corresponding to a number of operations at the memory location, to schedule a maintenance operation for the memory location in response to the count exceeding a first predetermined threshold, and to decrease the count by an amount corresponding to the first predetermined threshold in response to executing the scheduled maintenance operation. The circuitry may be further configured to disallow, in response to determining that the count has reached a maximum permitted value, further operations at the memory location until after the count has been decreased.

First claim

What is claimed is:

1 . An apparatus, comprising:
a dynamic random access memory (DRAM) device comprising one or more memory banks; and
a controller coupled with the DRAM device and configured to:
issue one or more activation (ACT) commands to the DRAM device;
increment a rolling accumulated ACT (RAA) count based at least in part on issuing the one or more ACT commands;
read an RAA count threshold from a mode register associated with the DRAM device;
issue a refresh maintenance command based at least in part on determining that the RAA count satisfies the RAA count threshold; and
decrement the RAA count based at least in part on issuing the refresh maintenance command.

2 . The apparatus of claim 1 , wherein the controller is further configured to cause the apparatus to:
prohibit issuance of one or more additional ACT commands based at least in part on determining that the RAA count satisfies a RAA maximum management threshold (RAAMMT), wherein issuing the refresh maintenance command is based at least in part on prohibiting the issuance of the one or more additional ACT commands.

3 . The apparatus of claim 2 , wherein the controller is further configured to cause the apparatus to:
permit the issuance of the one or more additional ACT commands based at least in part on decrementing the RAA count.

4 . The apparatus of claim 2 , wherein the controller is further configured to cause the apparatus to:
obtain the RAAMMT from the mode register associated with the DRAM device.

5 . The apparatus of claim 1 ,
wherein decrementing the RAA count is based at least in part on execution of a refresh operation associated with the refresh maintenance command at the DRAM device.

6 . The apparatus of claim 1 , wherein the controller is further configured to cause the apparatus to:
determine whether the RAA count satisfies the RAA count threshold based at least in part on comparing the RAA count to the RAA count threshold.

7 . The apparatus of claim 1 , wherein the one or more ACT commands are each associated with activating a respective memory bank of the one or more memory banks.

8 . The apparatus of claim 7 , wherein the RAA count threshold is associated with a quantity of ACT commands permitted for a memory bank of the one or more memory banks.

9 . The apparatus of claim 1 , wherein to decrement the RAA count, the controller is configured to cause the apparatus to:
decrement the RAA count by a predetermined quantity associated with the RAA count threshold.

10 . The apparatus of claim 1 , wherein the refresh maintenance command initiates a refresh operation for a single memory bank of the one or more memory banks.

11 . The apparatus of claim 10 , wherein the RAA count is decremented for the single memory bank associated with the refresh maintenance command.

12 . The apparatus of claim 1 , the controller is further configured to cause the apparatus to:
maintain a plurality of RAA counts each associated with a respective memory bank of the one or more memory banks, wherein the RAA count is one of the plurality of RAA counts, and wherein incrementing the RAA count is based at least in part on receiving an ACT command for a first memory bank associated with the RAA count.

13 . A method by a controller, comprising:
obtaining a rolling accumulated activation (RAA) maximum management threshold (RAAMMT) from a mode register associated with a dynamic random access memory (DRAM) device coupled with the controller; determining whether an RAA count maintained at the controller satisfies the RAAMMT based at least in part on one or more activation (ACT) commands; prohibiting issuance of one or more additional ACT commands based at least in part on determining that the RAA count satisfies the RAAMMT; issuing a refresh maintenance command based at least in part on determining that the RAA count satisfies the RAAMMT; decrementing the RAA count based at least in part on issuing the refresh maintenance command; and permitting the issuance of the one or more additional ACT commands based at least in part on decrementing the RAA count.

14 . The method of claim 13 , further comprising:
issuing the one or more ACT commands to the DRAM device.

15 . The method of claim 14 , further comprising:
incrementing the RAA count based at least in part on issuing the one or more ACT commands, wherein determining whether the RAA count satisfies the RAAMMT is based at least in part on incrementing the RAA count.

16 . The method of claim 13 ,
wherein decrementing the RAA count is based on at least in part on execution of a refresh operation associated with the refresh maintenance command at the DRAM device.

17 . The method of claim 13 , wherein decrementing the RAA count comprises:
decrementing the RAA count by a predetermined quantity associated with the refresh maintenance command.

18 . A method by a controller, comprising:
issuing one or more activation (ACT) commands to a dynamic random access memory (DRAM) device coupled with the controller; obtaining a rolling accumulated activation (RAA) maximum management threshold (RAAMMT) from a mode register associated with the DRAM device; determining whether at least one ACT command of the one or more ACT commands was prevented from being performed at the DRAM device; issuing a refresh maintenance command based at least in part on determining that the at least one ACT command of the one or more ACT commands was prevented from being performed; and issuing one or more additional ACT commands based at least in part on issuing the refresh maintenance command.

19 . The method of claim 18 , wherein the one or more ACT commands are each associated with activating a respective memory bank of the one or more memory banks of the DRAM device.

20 . The method of claim 18 , wherein the refresh maintenance command is associated with refreshing a memory bank of the DRAM device.

Assignees

• Lodestar Licensing Group Llc

Inventors

• Gans Dean D

Classifications

• G06F13/1668 Primary

  Details of memory controller · CPC title

• G11C11/2277

  Verifying circuits or methods · CPC title

• G11C29/04

  Detection or location of defective memory elements {, e.g. cell constructio details, timing of test signals} · CPC title

• G11C11/2257

  Word-line or row circuits · CPC title

• G06F12/0246

  in block erasable memory, e.g. flash memory · CPC title