Display panel test circuit
US-11493552-B2 · Nov 8, 2022 · US
US12444371B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-12444371-B2 |
| Application number | US-202418645802-A |
| Country | US |
| Kind code | B2 |
| Filing date | Apr 25, 2024 |
| Priority date | Sep 12, 2023 |
| Publication date | Oct 14, 2025 |
| Grant date | Oct 14, 2025 |
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A display apparatus includes: a display panel including a display area and a peripheral area adjacent to the display area, where the display panel includes a plurality of gate lines and a plurality of data lines; a scan driver arranged in the peripheral area, connected to the plurality of gate lines, and configured to driven by a first driving voltage and a second driving voltage less than the first driving voltage; a module crack detector arranged in the peripheral area and connected to the plurality of data lines; a short circuit detector arranged in the peripheral area and connected to the plurality of data lines; and an electrostatic blocking portion arranged in the peripheral area, connected to the plurality of data lines, and including a voltage transfer line to which an intermediate voltage less than the first driving voltage and greater than the second driving voltage is applied.
Opening claim text (preview).
What is claimed is: 1. A display apparatus comprising: a display panel including a display area and a peripheral area adjacent to the display area, wherein the display panel includes a plurality of gate lines and a plurality of data lines; a scan driver arranged in the peripheral area, connected to the plurality of gate lines, and configured to be driven by a first driving voltage and a second driving voltage less than the first driving voltage; a module crack detector arranged in the peripheral area and connected to the plurality of data lines; a short circuit detector arranged in the peripheral area and connected to the plurality of data lines; and an electrostatic blocking portion arranged in the peripheral area, connected to the plurality of data lines, and including a voltage transfer line to which an intermediate voltage less than the first driving voltage and greater than the second driving voltage is applied. 2. The display apparatus of claim 1 , wherein the intermediate voltage applied to the voltage transfer line is one of a ground power supply voltage, a reference voltage, and an initialization voltage. 3. The display apparatus of claim 1 , further comprising a driving voltage supply line to which the first driving voltage is applied, wherein the driving voltage supply line is connected to the module crack detector. 4. The display apparatus of claim 3 , wherein the display panel includes a first data line configured to transfer a first data signal to a first pixel line, and a second data line configured to transfer a second data signal to a second pixel line, wherein the first data line and the second data line are included in the plurality of data lines. 5. The display apparatus of claim 4 , wherein the module crack detector includes a 1-1 conductive line electrically connected to the driving voltage supply line, and a 1-1 transistor portion electrically connecting the first data line to the 1-1 conductive line. 6. The display apparatus of claim 5 , wherein the module crack detector further includes a 1-2 transistor portion electrically connecting the second data line to the 1-1 conductive line. 7. The display apparatus of claim 6 , wherein the 1-1 conductive line is configured to transfer a first static charge introduced from outside to a ground line. 8. The display apparatus of claim 7 , wherein the first static charge is a positive charge. 9. The display apparatus of claim 4 , wherein the short circuit detector includes: a 2-1 conductive line electrically connected to the driving voltage supply line; and a 2-1 transistor portion connecting the first data line to the 2-1 conductive line. 10. The display apparatus of claim 9 , wherein the short circuit detector further includes: a 2-2 conductive line electrically connected to the driving voltage supply line; and a 2-2 transistor portion connecting a third data line to the 2-2 conductive line, wherein the third data line is included in the plurality of data lines and configured to transfer a third data signal to a third pixel line. 11. The display apparatus of claim 10 , wherein the short circuit detector further includes a 2-3 conductive line connected to a gate of the 2-1 transistor portion and a gate of the 2-2 transistor portion. 12. The display apparatus of claim 4 , wherein the voltage transfer line is electrically connected to a power line to which the intermediate voltage is applied. 13. The display apparatus of claim 12 , wherein the intermediate voltage is one of a ground power supply voltage, a reference voltage, and an initialization voltage. 14. The display apparatus of claim 12 , wherein the intermediate voltage is a ground power supply voltage, and the voltage transfer line is connected to a power ground line to which the ground power supply voltage is applied. 15. The display apparatus of claim 14 , wherein the electrostatic blocking portion further includes a 3-1 transistor portion connecting the second data line to the voltage transfer line. 16. The display apparatus of claim 15 , wherein the electrostatic blocking portion further includes a 3-2 transistor portion connecting the first data line to the voltage transfer line. 17. The display apparatus of claim 16 , wherein the voltage transfer line is configured to transfer a second static charge introduced from outside to the power ground line. 18. The display apparatus of claim 17 , wherein the second static charge is a negative charge. 19. The display apparatus of claim 14 , wherein, in a plan view, a width of the power ground line is greater than a width of the driving voltage supply line. 20. The display apparatus of claim 1 , further comprising a data driver arranged in the peripheral area, wherein, in a plan view, the module crack detector is arranged between the display area and the short circuit detector, the short circuit detector is arranged between the module crack detector and the electrostatic blocking portion, and the electrostatic blocking portion is arranged between the short circuit detector and the data driver.
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