Electronic device fabrication using area-selective deposition

Patent metadata

Field	Value
Publication number	US-12438050-B2
Application number	US-202318109365-A
Country	US
Kind code	B2
Filing date	Feb 14, 2023
Priority date	Feb 14, 2023
Publication date	Oct 7, 2025
Grant date	Oct 7, 2025

Abstract

A method includes selectively forming at least one passivation layer on at least one first conductive layer disposed in a first interlevel dielectric (ILD) layer, selectively forming at least one catalyst layer on the at least one passivation layer, wherein the at least one passivation layer prevents formation of the at least one catalyst layer on the first conductive layer, and selectively forming at least one supplemental dielectric layer using the at least one catalyst layer. The at least one catalyst layer induces formation of the at least one supplemental dielectric layer, and the at least one supplemental dielectric layer includes a dielectric material having a dielectric constant of less than or equal to about 4.

First claim

What is claimed is:

1. A method comprising:
selectively forming at least one passivation layer on at least one first conductive layer disposed in a first interlevel dielectric (ILD) layer;
selectively forming at least one catalyst layer on the at least one passivation layer, wherein the at least one passivation layer prevents formation of the at least one catalyst layer on the first conductive layer; and
selectively forming at least one supplemental dielectric layer using the at least one catalyst layer, wherein the at least one catalyst layer induces formation of the at least one supplemental dielectric layer, and wherein the at least one supplemental dielectric layer comprises a dielectric material having a dielectric constant of less than or equal to about 4.

2. The method of claim 1 , wherein selectively forming the at least one passivation layer comprises forming the at least one passivation layer using a vapor-phase passivant.

3. The method of claim 1 , wherein selectively forming the at least one passivation layer comprises forming the at least one passivation layer using a solution-phase passivant.

4. The method of claim 1 , wherein the at least one catalyst layer comprises at least one of: a metal-catalyst layer or a metalloid-catalyst layer.

5. The method of claim 4 , wherein selectively forming the at least one supplemental dielectric layer comprises forming the at least one supplemental dielectric layer using a catalyzed precursor.

6. The method of claim 1 , wherein the at least one supplemental dielectric layer comprises a silicate.

7. The method of claim 6 , wherein the silicate comprises at least one of: a silicon oxide (SiO x ) or a silicon oxycarbide (SiOC).

8. The method of claim 1 , wherein the at least one supplemental dielectric layer has a thickness of about 10 nm to about 20 nm.

9. The method of claim 1 , further comprising:
forming a second ILD layer over the at least one supplemental dielectric layer and the at least one first conductive layer; and
forming, in the second ILD layer, at least one second conductive layer in contact with the at least one first conductive layer.

10. The method of claim 9 , wherein the at least one first conductive layer comprises a first via, and the at least one second conductive layer comprises a second via in contact with the first via.

11. A system comprising at least one chamber operatively coupled to at least one store, the at least one chamber being configured to:
selectively form at least one passivation layer on at least one first conductive layer disposed in a first interlevel dielectric (ILD) layer;
selectively form at least one catalyst layer on the at least one passivation layer, wherein the at least one passivation layer prevents formation of the at least one catalyst layer on the first conductive layer; and
selectively form at least one supplemental dielectric layer using the at least one catalyst layer, wherein the at least one catalyst layer induces formation of the at least one supplemental dielectric layer, and wherein the at least one supplemental dielectric layer comprises a dielectric material having a dielectric constant of less than or equal to about 4.

12. The system of claim 11 , wherein the at least one store maintains at least one of: a vapor-phase passivant for selectively forming the at least one passivation layer, or a solution-phase passivant for selectively forming the at least one passivation layer.

13. The system of claim 11 , wherein the at least one store maintains at least one catalyst layer precursor for selectively forming the at least one catalyst layer.

14. The system of claim 11 , wherein the at least one catalyst layer comprises at least one of: a metal-catalyst layer or a metalloid-catalyst layer.

15. The system of claim 11 , wherein the at least one chamber is configured to form the at least one supplemental dielectric layer using a catalyzed precursor.

16. The system of claim 11 , wherein the at least one supplemental dielectric layer comprises a silicate, wherein the at least one store maintains a silanol, and wherein the at least one chamber is configured to form the at least one supplemental dielectric layer using the silanol as a deposition precursor.

17. The system of claim 16 , wherein the silicate comprises at least one of: a silicon oxide (SiO x ) or a silicon oxycarbide (SiOC).

18. The system of claim 11 , wherein the at least one supplemental dielectric layer has a thickness between about 10 nm to about 20 nm.

19. The system of claim 11 , wherein the at least one chamber is further configured to:
form a second ILD layer over the at least one supplemental dielectric layer and the at least one first conductive layer; and
form, within the second ILD layer, at least one second conductive layer in contact with the at least one first conductive layer.

20. The system of claim 19 , wherein the at least one first conductive layer comprises a first via, and the at least one second conductive layer comprises a second via in contact with the first via.

Assignees

• Applied Materials Inc

Inventors

• Devereaux Zachary J
• Bhuyan Bhaskar Jyoti
• Knisley Thomas Joseph
• Shen Zeqing
• Roy Susmit Singha
• Saly Mark J
• Mallick Abhijit Basu

Classifications

• H10P14/69215

  the material being a silicon oxide, e.g. SiO2 · CPC title

• H10P14/6922

  the material containing Si, O and at least one of H, N, C, F or other non-metal elements, e.g. SiOC, SiOC:H or SiONC · CPC title

• H10P14/6506 Primary

  Formation of intermediate materials · CPC title

• H10P14/6339

  deposition by cyclic CVD, e.g. ALD, ALE or pulsed CVD · CPC title

• H10W20/081

  by forming openings in the dielectric parts · CPC title