Method for transferring a layer from a source substrate to a destination substrate

Patent metadata

Field	Value
Publication number	US-12424497-B2
Application number	US-202318865498-A
Country	US
Kind code	B2
Filing date	May 4, 2023
Priority date	May 18, 2022
Publication date	Sep 23, 2025
Grant date	Sep 23, 2025

Abstract

A method of transferring a layer from a source substrate to a destination substrate, including the following steps: a) arranging a masking disk on a central portion of a bonding surface of said layer and/or of the destination substrate b) implementing an ion etching to form a step in front of a peripheral portion, not covered with the masking disk, of the bonding surface of said layer and/or of the destination substrate c) removing the masking disk; d) activating the bonding surface of said layer and the bonding surface of the destination substrate; and e) placing into contact the bonding surface of said layer with the bonding surface of the destination substrate.

First claim

The invention claimed is:

1. Method of transferring a layer from a source substrate to a destination substrate, comprising the following steps:
a) arranging a masking disk on a central portion of a bonding surface of said layer and/or of the destination substrate;
b) implementing an ion etching to form a step in front of a peripheral portion, not covered with the masking disk, of the bonding surface of said layer and/or of the destination substrate;
c) removing the masking disk;
d) activating the bonding surface of said layer and the bonding surface of the destination substrate by ion etching or ion deposition of a bonding material; and
e) after step d), placing into contact the bonding surface of said layer with the bonding surface of the destination substrate,
wherein steps b) and d) are successively implemented in a same ion treatment chamber; and
wherein steps d) and e) are implemented under vacuum, with no rupture of vacuum between the two steps.

2. Method according to claim 1 , wherein the destination substrate and/or the source substrate has tapered edges across a first width.

3. Method according to claim 2 , wherein, after step b), the step extends, from the edge of said layer and/or from the edge of the destination substrate across a width greater than or equal to the first width.

4. Method according to claim 1 , wherein the disk has a diameter smaller than the diameter of the source substrate and/or than the diameter of the destination substrate.

5. Method according to claim 1 , comprising, after step e), a step f) of removal of the source substrate.

6. Method according to claim 5 , wherein step f) comprises an anneal step resulting in fracturing the assembly obtained at the end of step e), in the plane of an implanted buried layer separating said layer from the source substrate.

7. Method according to claim 1 , wherein said layer is a semiconductor layer.

8. Method according to claim 5 , comprising, after step f), a step of epitaxy on top of and in contact with the surface of said layer opposite to the destination substrate.

9. Method according to claim 1 , wherein, after step b), the step extends down to a depth, from the bonding surface of said layer and/or the bonding surface of the destination substrate, greater than 700 nm.

10. Method according to claim 1 , wherein step d) consists of the deposit of a bonding layer onto the bonding surface of said layer and/or onto the bonding surface of the destination substrate.

11. Method according to claim 10 , wherein the bonding layer has a thickness in the range from 0.2 nm to 100 nm, for example, in the range from 1 nm to 20 nm.

Assignees

• Commissariat A Ienergie Atomique Et Aux Energies Alternatives
• Commissariat Energie Atomique

Inventors

• Widiez Julie
• Fournel Frank

Classifications

• H10P95/112 Primary

  leaving a reusable substrate, e.g. epitaxial lift off · CPC title

• H10P90/1914

  using bonding · CPC title

• H10P90/00 Primary

  Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement · CPC title

• H10P10/128 Primary

  by direct semiconductor to semiconductor bonding · CPC title

• B32B2457/14

  Semiconductor wafers · CPC title