Display control method of display panel, display module, and display device
US-2024185776-A1 · Jun 6, 2024 · US
US12424172B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-12424172-B2 |
| Application number | US-202218558748-A |
| Country | US |
| Kind code | B2 |
| Filing date | Dec 21, 2022 |
| Priority date | Dec 21, 2022 |
| Publication date | Sep 23, 2025 |
| Grant date | Sep 23, 2025 |
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A display substrate and a display apparatus. The display substrate includes a base substrate and a drive circuit layer provided on the base substrate. The base substrate includes a display region ( 100 ) and a non-display region ( 200 ), the drive circuit layer includes a pixel drive circuit (PE) located in the display region, a gate drive circuit located in the non-display region and at least one initial power supply line extending at least partially in a first direction (D 1 ). The gate drive circuit is configured to provide a drive signal to the pixel drive circuit, and the initial power supply line is configured to provide an initial signal to the pixel drive circuit. An orthographic projection of at least one of the at least one initial power supply line on the base substrate is at least partially overlapped with an orthographic projection of the gate drive circuit on the base substrate.
Opening claim text (preview).
The invention claimed is: 1. A display substrate, comprising: a base substrate and a drive circuit layer arranged on the base substrate, wherein the base substrate comprises a display region and a non-display region, and the drive circuit layer comprises a pixel drive circuit located in the display region, a gate drive circuit located in the non-display region, and at least one initial power supply line which extends at least partially along a first direction; the gate drive circuit is configured to provide a drive signal to the pixel drive circuit, and the initial power supply line is configured to provide an initial signal to the pixel drive circuit, wherein at least one gate drive circuit is located on at least one side of the display region respectively; an orthographic projection of at least one of the at least one initial power supply line on the base substrate is at least partially overlapped with an orthographic projection of the gate drive circuit on the base substrate; wherein one of the at least one gate drive circuit on one side of the display region comprises: a plurality of drive circuits arranged along a second direction; and the at least one initial power supply line comprises: a first initial power supply line to an N-th initial power supply line, wherein the first direction intersects with the second direction, and N is a positive integer greater than or equal to 2; and the N initial power supply lines are arranged along the second direction, and an orthographic projection of K adjacent initial power supply lines away from the display region on the base substrate is at least partially overlapped with an orthographic projection of a drive circuit, close to the display region, of the plurality of drive circuits on the side of the display region on the base substrate, wherein K is a positive integer less than or equal to N. 2. The display substrate according to claim 1 , wherein the pixel drive circuit comprises a light emitting transistor and a writing transistor, and the plurality of drive circuits comprise a light emitting drive circuit and a scan drive circuit, wherein the light emitting drive circuit is electrically connected to the light emitting transistor, and the scan drive circuit is electrically connected to the writing transistor, and is located on a side of the light emitting drive circuit close to the display region; and an orthographic projection of the at least one initial power supply line on the base substrate is at least partially overlapped with an orthographic projection of the scan drive circuit on the base substrate; or wherein the pixel drive circuit comprises a light emitting transistor, a writing transistor, and a control transistor, and the plurality of drive circuits comprise a light emitting drive circuit, a scan drive circuit, and a control drive circuit, wherein the light emitting drive circuit is electrically connected to the light emitting transistor, the scan drive circuit is electrically connected to the writing transistor, the control drive circuit is electrically connected to the control transistor, and the writing transistor and the control transistor have opposite transistor types; and the light emitting drive circuit and the control drive circuit are located on a side of the scan drive circuit away from the display region; and an orthographic projection of the at least one initial power supply line on the base substrate is at least partially overlapped with an orthographic projection of the scan drive circuit on the base substrate. 3. The display substrate according to claim 2 , wherein the orthographic projection of the K adjacent initial power supply lines away from the display region on the base substrate is at least partially overlapped with an orthographic projection of the scan drive circuit on the base substrate. 4. The display substrate according to claim 3 , wherein the drive circuit layer further comprises: a first clock signal line, a second clock signal line, a first initial signal line, a first power supply line, and a second power supply line, which are located in the non-display region, wherein the first clock signal line, the second clock signal line, the first initial signal line, the first power supply line, and the second power supply line extend at least partially along the first direction; the scan drive circuit is electrically connected with the first clock signal line, the second clock signal line, the first power supply line, the second power supply line and the first initial signal line, respectively; and the second clock signal line is located on a side of the first clock signal line away from the display region, the second power supply line is located on a side of the first clock signal line close to the display region, the first initial signal line is located on a side of the second power supply line close to the display region, the first power supply line is located on a side of the first initial signal line close to the display region, and the at least one initial power supply line is located on a side of the first power supply line close to the display region. 5. The display substrate according to claim 4 , wherein the driver circuit layer further comprises: a second initial signal line located in the non-display region, and the second initial signal line extends at least partially along the first direction; and the light emitting drive circuit is electrically connected with the second initial signal line, and the second initial signal line is located between the second power supply line and the first initial signal line. 6. The display substrate according to claim 5 , wherein the drive circuit layer further comprises a first output signal line and a second output signal line which are located in the non-display region, and the first output signal line and the second output signal line extend at least partially along the second direction; the first output signal line is located on a side of the scan drive circuit close to the display region, and is electrically connected with the scan drive circuit and the pixel drive circuit, respectively; and the second output signal line passes through the scan drive circuit, and is electrically connected to the pixel drive circuit and one of the light emitting drive circuit and the control drive circuit, respectively. 7. The display substrate according to claim 6 , wherein the drive circuit layer further comprises: a first output connection line and a second output connection line which are located in the display region and the non-display region, and the first output connection line and the second output connection line extend at least partially along the second direction; the first output connection line is electrically connected with the first output signal line and the pixel drive circuit, respectively; and the second output connection line is electrically connected with the second output signal line and the pixel drive circuit, respectively. 8. The display substrate according to claim 7 , wherein the drive circuit layer further comprises: a third output connection line and a fourth output connection line, and the third output connection line and the fourth output connection line extend at least partially along the second direction; the third output connection line is electrically connected with the first initial power supply line and the pixel drive circuit, respectively; and the fourth output connection line is electrically connected with a second initial power supply line and the pixel drive circuit, respectively. 9. The display substrate according to claim 4 , wherein a boundary of the display region comprises an arc-shaped boundary, and a non-display region located outside the arc-shaped boundary
Details of a shift registers arranged for use in a driving circuit · CPC title
Arrangement of scan or data electrode driver circuits at the periphery of a panel not inherent to a split matrix structure · CPC title
Several active elements per pixel in active matrix panels · CPC title
Pixel structures · CPC title
Layout of electrodes and connections · CPC title
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