Display panel and display device

Patent metadata

Field	Value
Publication number	US-11915657-B2
Application number	US-202218047361-A
Country	US
Kind code	B2
Filing date	Oct 18, 2022
Priority date	Jun 22, 2022
Publication date	Feb 27, 2024
Grant date	Feb 27, 2024

Abstract

A display panel and a display device are provided. In an embodiment, the display panel has a display region and a non-display region and includes shift registers cascaded and arranged along a first direction. In an embodiment, the shift registers are located in the non-display region. In an embodiment, one of the shift registers includes a switch module and an output module. In an embodiment, the output module is coupled to an output terminal of the shift register and includes two output transistors, and the output transistors are located at a side of the switch module away from the display region. In this way, the probability of occurrence of abnormal phenomena, such as splash screen display, is reduced.

First claim

What is claimed is:

1. A display panel comprising:
a display region;
a non-display region;
shift registers cascaded and arranged along a first direction and located in the non-display region,
wherein a shift register of the shift registers comprises a switch module and an output module, the output module is coupled to an output terminal of the shift register and comprises only and exactly two output transistors, and the two output transistors comprise a first output transistor and a second output transistor that are located at a side of the switch module away from the display region,
wherein the display panel further comprises driving signal lines arranged in the non-display region, each driving signal line of the driving signal lines extends along the first direction, and the shift registers are coupled to the driving signal lines,
wherein a control electrode of the first output transistor is coupled to a first node, a first electrode of the first output transistor is coupled to one of the driving signal lines, and a second electrode of the first output transistor is coupled to the output terminal of the shift register; and a control electrode of the second output transistor is coupled to a second node that is not directly connected to the first node, a first electrode of the second output transistor is coupled to another one of the driving signal lines, and a second electrode of the second output transistor is coupled to the output terminal of the shift register.

2. The display panel according to claim 1 ,
wherein at least one of the driving signal lines is located between the shift registers and the display region.

3. The display panel according to claim 2 , wherein the driving signal lines comprise a first power supply voltage signal line and a second power supply voltage signal line, wherein at least one of the first power supply voltage signal line or the second power supply voltage signal line is located between the shift registers and the display region.

4. The display panel according to claim 3 , wherein the driving signal lines comprise a first clock signal line and a second clock signal line, wherein the first clock signal line and the second clock signal line are configured to transmit opposite voltage signals in at least one moment, and the first clock signal line and the second clock signal line are located between the shift registers and the display region.

5. The display panel according to claim 4 , wherein the first clock signal line and the second clock signal line are located between the first power supply voltage signal line and the second power supply voltage signal line in a second direction intersecting with the first direction.

6. The display panel according to claim 2 , wherein at least one of the driving signal lines is located at a side of the shift registers away from the display region.

7. The display panel according to claim 6 , wherein the driving signal lines comprise a first clock signal line and a second clock signal line, wherein the first clock signal line and the second clock signal line are configured to transmit opposite voltage signals at a same moment, and at least one of the first clock signal line or the second clock signal line is located at a side of the shift registers away from the display region.

8. The display panel according to claim 6 , wherein the driving signal lines further comprise a start signal line, wherein an input terminal of a first shift register of the shift registers that is effective is coupled to the start signal line, and the start signal line is located at a side of the shift register away from the display region.

9. The display panel according to claim 2 , further comprising:
scanning signal lines arranged in the display region and coupled to the output terminals of the shift registers; and
a connection line arranged in the non-display region and comprising: an end coupled to the output terminal of one of the shift registers and another end coupled to one of the scanning signal lines,
wherein the connection line is insulated from and intersects with the at least one driving signal line located between the shift registers and the display region.

10. The display panel according to claim 9 , further comprising:
a substrate, and
a first metal layer, a second metal layer, and a third metal layer that are located at a side of the substrate and sequentially arranged in a direction away from the substrate,
wherein the driving signal lines are located in the third metal layer, and the connection line is located in the first metal layer.

11. The display panel according to claim 1 ,
wherein the shift registers comprise a scanning shift register and a light-emitting shift register,
wherein, in at least one of the scanning shift register or the light-emitting shift register, the output transistor is located at a side of the switch module away from the display region;
wherein, in a second direction intersecting with the first direction, the scanning shift register and the light-emitting shift register are located at two sides of the display region, respectively.

12. The display panel according to claim 1 ,
wherein the shift registers comprise a scanning shift register and a light-emitting shift register,
wherein, in a second direction intersecting with the first direction, the light-emitting shift register and the scanning shift register are located at a same side of the display region, and the light-emitting shift register is located at a side of the scanning shift register close to the display region; and
wherein, in the scanning shift register, the output transistor is located at a side of the switch module away from the display region.

13. The display panel according to claim 1 , further comprising:
a substrate; and
an array layer and a display layer that are located at a side of the substrate,
wherein the shift registers are located in the array layer, and the display layer is located at a side of the array layer away from the substrate;
wherein the display layer comprises a first electrode layer comprising first electrodes that are patterned;
wherein the array layer comprises a semiconductor layer and a target metal layer, and in a direction perpendicular to a plane of the substrate, the target metal layer is a metal layer closest to the first electrode layer;
wherein the display panel further comprises at least one groove formed in the non-display region, and in the direction perpendicular to the plane of the substrate, the at least one groove penetrates through at least one insulating layer located between the semiconductor layer and the target metal layer; and
wherein the at least one groove is located at a side of the switch module away from the display region.

14. The display panel according to claim 13 , wherein the at least one groove comprises a first groove, and the first groove penetrates through all insulating layers located between the semiconductor layer and the target metal layer.

15. The display panel according to claim 13 ,
wherein the array layer comprises a first insulating layer, and the first insulating layer is located at a side of the semiconductor layer away from the substrate and is in contact with the semiconductor layer; and
wherein the at least one groove comprises a second groove, and the second groove at least penetrates through the first insulating layer.

16. The display panel according to claim 13 , wherein the at least one groove comprises a third groove and a fourth groove, and in the direction perpendicular to the plane of the substrate, the third groove and the fourth

Assignees

• Wuhan Tianma Micro Electronics Co Ltd
• Wuhan Tianma Microelectronics Co Ltd Shanghai Branch

Inventors

• Li Yue
• Zhang Peng
• Zhang Mengmeng
• Huang Gaojun

Classifications

• G09G3/3266 Primary

  Details of drivers for scan electrodes · CPC title

• G11C19/28 Primary

  using semiconductor elements (G11C19/14, G11C19/36 take precedence) · CPC title

• G09G3/035

  for flexible display surfaces · CPC title

• G09G3/3225 Primary

  using an active matrix · CPC title

• G09G3/3233

  with pixel circuitry controlling the current through the light-emitting element · CPC title