Manifolds for uniform vapor deposition

Patent metadata

Field	Value
Publication number	US-12416081-B2
Application number	US-202217810115-A
Country	US
Kind code	B2
Filing date	Jun 30, 2022
Priority date	Jun 1, 2016
Publication date	Sep 16, 2025
Grant date	Sep 16, 2025

Abstract

A semiconductor device comprising a manifold for uniform vapor deposition is disclosed. The semiconductor device can include a manifold comprising a bore and having an inner wall. The inner wall can at least partially define the bore. A first axial portion of the bore can extend along a longitudinal axis of the manifold. A supply channel can provide fluid communication between a gas source and the bore. The supply channel can comprise a slit defining an at least partially annular gap through the inner wall of the manifold to deliver a gas from the gas source to the bore. The at least partially annular gap can be revolved about the longitudinal axis.

First claim

What is claimed is:

1. A semiconductor processing device, comprising:
a manifold comprising a bore and having an inner wall, the inner wall at least partially defining the bore, a first axial portion of the bore extending along a longitudinal axis of the manifold; and
a supply channel that provides fluid communication between a gas source and the bore, the supply channel comprising a slit defining an at least partially annular gap through the inner wall of the manifold to deliver a gas from the gas source to the bore, the at least partially annular gap revolved about the longitudinal axis,
wherein the at least partially annular gap is revolved about the longitudinal axis in a range of 90° to 360.

2. The semiconductor processing device of claim 1 , further comprising a gas distribution channel that conveys the gas from the gas source to the supply channel, the gas distribution channel having a thickness along the longitudinal axis that is larger than the at least partially annular gap.

3. The semiconductor processing device of claim 2 , further comprising a reactant gas valve configured to selectively transfer the gas to the gas distribution channel.

4. The semiconductor processing device of claim 2 , wherein the thickness of the gas distribution channel is at least twice a thickness of the at least partially annular gap.

5. The semiconductor processing device of claim 1 , wherein the at least partially annular gap is revolved about the longitudinal axis in a range of 120° to 360°.

6. The semiconductor processing device of claim 1 , wherein a thickness of the at least partially annular gap is in a range of 0.1 mm to 1 mm.

7. The semiconductor processing device of claim 1 , further comprising a second supply channel that provides fluid communication between a second gas source and the bore, the second supply channel comprising a second slit defining a second at least partially annular gap through the inner wall of the manifold to deliver a second gas from the second gas source to the bore, the second at least partially annular gap revolved about the longitudinal axis and disposed upstream of the at least partially annular gap.

8. A semiconductor processing device, comprising:
a manifold comprising a bore; and
a supply channel that provides fluid communication between a gas source and the bore to supply a gas to the bore,
wherein the bore comprises a channel having an annular flow portion with an at least partially annular cross-section and a non-annular flow portion with a non-annular cross-section, the non-annular flow portion disposed downstream of the annular flow portion,
wherein the manifold comprises a plurality of blocks connected together to define the bore and the supply channel,
wherein the annular flow portion comprises a plug disposed in the bore, the annular flow portion disposed between an outer periphery of the plug and an inner wall of the manifold, and
wherein the annular flow portion comprises a first block of the plurality of blocks, the first block comprising an opening through which the plug is disposed and one or more holes disposed adjacent the opening.

9. The semiconductor processing device of claim 8 , wherein the supply channel comprises a slit defining an at least partially annular gap through the inner wall.

10. The semiconductor processing device of claim 8 , wherein the plug comprises one or more tapered portions.

11. The semiconductor processing device of claim 8 , wherein the bore comprises a second non-annular flow portion disposed upstream of the annular flow portion.

12. The semiconductor processing device of claim 8 , wherein the plurality of blocks connected together defines a slit formed by at least a partially annular gap through the inner wall of the manifold.

13. The semiconductor processing device of claim 9 , wherein the at least partially annular gap is revolved about a longitudinal axis in a range of 90° to 360.

14. The semiconductor processing device of claim 8 , further comprising a second supply channel that provides fluid communication between a second gas source and the bore, the second supply channel disposed upstream of the supply channel.

15. A semiconductor processing device, comprising:
a manifold comprising a bore;
a supply channel that provides fluid communication between a gas source and the bore to supply a gas to the bore, the supply channel comprising a slit defining an at least partially annular gap through the inner wall of the manifold to deliver a gas from the gas source to the bore, the at least partially annular gap revolved about the longitudinal axis; and
a plug disposed within the bore,
wherein the bore comprises a channel having an annular flow portion with an at least partially annular cross-section and a non-annular flow portion with a non-annular cross-section, the non-annular flow portion disposed downstream of the annular flow portion.

16. The semiconductor processing device of claim 15 , wherein the slit supplies the gas to the annular flow portion of the bore.

17. The semiconductor processing device of claim 15 , wherein the annular flow portion is disposed between an outer periphery of the plug and the inner wall of the manifold.

18. The semiconductor processing device of claim 15 , further comprising a second supply channel that provides fluid communication between a second gas source and the bore, the second supply channel comprising a second slit defining a second at least partially annular gap through the inner wall of the manifold to deliver a second gas from the second gas source to the bore, the second at least partially annular gap revolved about the longitudinal axis and disposed upstream of the at least partially annular gap.

19. The semiconductor processing device of claim 15 , wherein the bore comprises a second non-annular flow portion disposed upstream of the annular flow portion.

20. The semiconductor processing device of claim 15 , further comprising a gas distribution channel that conveys the gas from the gas source to the supply channel.

Assignees

• Asm Ip Holding Bv

Inventors

• Marquardt David
• Yednak Iii Andrew Michael
• Shero Eric James
• Terhorst Herbert

Classifications

• H10P14/43

  Chemical deposition, e.g. chemical vapour deposition [CVD] · CPC title

• H10P14/24

  using chemical vapour deposition [CVD] · CPC title

• C23C16/45561

  Gas plumbing upstream of the reaction chamber · CPC title

• C23C16/45576

  Coaxial inlets for each gas · CPC title

• C23C16/45512

  Premixing before introduction in the reaction chamber · CPC title