Methods for forming structures with desired crystallinity for MRAM applications

US12408557B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-12408557-B2
Application numberUS-202117486649-A
CountryUS
Kind codeB2
Filing dateSep 27, 2021
Priority dateJul 14, 2015
Publication dateSep 2, 2025
Grant dateSep 2, 2025

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  7. Citations and related patents

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Abstract

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Embodiments of the disclosure provide methods and apparatus for fabricating magnetic tunnel junction (MTJ) structures on a substrate in for spin-transfer-torque magnetoresistive random access memory (STT-MRAM) applications. In one example, a film stack utilized to form a magnetic tunnel junction structure on a substrate includes a pinned layer disposed on a substrate, wherein the pinned layer comprises multiple layers including at least one or more of a Co containing layer, Pt containing layer, Ta containing layer, an Ru containing layer, an optional structure decoupling layer disposed on the pinned magnetic layer, a magnetic reference layer disposed on the optional structure decoupling layer, a tunneling barrier layer disposed on the magnetic reference layer, a magnetic storage layer disposed on the tunneling barrier layer, and a capping layer disposed on the magnetic storage layer.

First claim

Opening claim text (preview).

What is claimed is: 1. A method of forming a magnetic tunnel junction structure on a substrate, comprising: patterning a film stack having a tunneling barrier layer disposed between a magnetic reference layer and a magnetic storage layer disposed on a substrate to remove a portion of the film stack from the substrate until an upper surface of the substrate is exposed, wherein the magnetic storage layer comprises a first magnetic storage sublayer, a second magnetic storage sublayer and a metallic intermediate layer therebetween; forming a conformal sidewall passivation layer on sidewalls of the patterned film stack, wherein the sidewall passivation layer is in direct contact with a top surface of the substrate and covering the top surface, wherein the sidewall passivation layer has a vertical portion continuously coplanar along a vertical axis normal to a major axis of the substrate and a horizontal portion in direct contact with the substrate and extending outwardly from the vertical portion along the substrate; forming an insulation layer comprising silicon oxide, where the portion of the film stack was removed during patterning, that is in direct contact with the sidewall passivation layer such that the horizontal portion is between the insulation layer and the substrate and the insulation layer does not contact the top surface of the substrate; and subsequently performing a thermal annealing process to the film stack, wherein the insulation layer extends from a top surface of the sidewall passivation layer to the horizontal portion of the sidewall passivation layer wherein the film stack further comprises a pinning layer disposed between the substrate and the magnetic reference layer, the pinning layer further comprising sequentially from the magnetic reference layer in the direction of the substrate; a Co layer, a Co/Pt layer, an Ru layer, a Co layer, a Co/Pt layer, a Pt layer, a Ta layer, an Ru layer, a Ta layer, and a TaN layer. 2. The method of claim 1 , wherein performing the thermal annealing process further comprises: maintaining the substrate temperature at between about 250 degrees Celsius and about 550 degree Celsius. 3. The method of claim 1 , wherein the film stack further comprises a capping layer disposed on the magnetic storage layer. 4. The method of claim 1 , wherein the film stack further comprises a pinning layer disposed between the substrate and the magnetic reference layer. 5. The method of claim 4 , wherein the film stack further comprises a structure decoupling layer disposed between the pinning layer and the magnetic reference layer. 6. A method of forming a magnetic tunnel junction structure on a substrate, comprising: patterning a film stack having a tunneling barrier layer disposed between a magnetic reference layer and a magnetic storage layer disposed on a substrate to remove a portion of the film stack from the substrate until an upper surface of the substrate is exposed, wherein the magnetic storage layer comprises a first magnetic storage sublayer, a second magnetic storage sublayer and a metallic intermediate layer therebetween; forming a sidewall passivation layer comprising carbon containing materials or nitrogen containing materials on sidewalls of the patterned film stack, the sidewall passivation layer having a vertical portion coplanar along a vertical axis normal to a major axis of the substrate and a horizontal portion extending outwardly from the vertical portion along the substrate such that the horizontal portion covers the upper surface of the substrate where the portion of the film stack was removed during patterning; and subsequently performing a thermal annealing process to the film stack wherein the film stack further comprises a pinning layer disposed between the substrate and the magnetic reference layer, the pinning layer further comprising sequentially from the magnetic reference layer in the direction of the substrate; a Co layer, a Co/Pt layer, an Ru layer, a Co layer, a Co/Pt layer, a Pt layer, a Ta layer, an Ru layer, a Ta layer, and a TaN layer. 7. The method of claim 6 , wherein performing the thermal annealing process further comprises: maintaining the substrate temperature at between about 250 degrees Celsius and about 550 degree Celsius. 8. The method of claim 6 , wherein the film stack further comprises a capping layer disposed on the magnetic storage layer. 9. The method of claim 6 , wherein the film stack further comprises a pinning layer disposed between the substrate and the magnetic reference layer. 10. The method of claim 9 , wherein the film stack further comprises a structure decoupling layer disposed between the pinning layer and the magnetic reference layer. 11. The method of claim 6 , wherein the magnetic reference layer and the magnetic storage layer are fabricated from metal alloy with boron dopants. 12. The method of claim 6 , wherein forming the sidewall passivation layer further comprises: forming a dielectric layer on the sidewalls of the patterned film stack by a chemical vapor deposition process. 13. The method of claim 12 , wherein the dielectric layer of the sidewall passivation layer is at least one of SiN, SiCN, SiO 2 , SION, SiC, amorphous carbon, amorphous carbon, SiOC, or aluminum nitride (AlN). 14. The method of claim 6 , wherein the sidewall passivation layer is formed from by-products generated during the pattering of the film stack. 15. The method of claim 6 , wherein forming the sidewall passivation layer further comprises: forming an insulation layer on the substrate where the portion of the film stack is removed. 16. The method of claim 15 , wherein the thermal annealing process is performed after a back end process is performed in the insulation layer or right after the insulation layer is formed on the substrate. 17. The method of claim 6 , wherein performing the thermal annealing process further comprises: altering crystalline structures of the magnetic reference layer and a magnetic storage layer. 18. The method of claim 6 , wherein performing the thermal annealing process further comprises: driving dopants in the magnetic reference layer and the magnetic storage layer laterally outward to the sidewall passivation layer. 19. The method of claim 18 , wherein the dopant reacts with the sidewall passivation layer to form a dopant compound. 20. A method of forming a magnetic tunnel junction structure on a substrate, comprising: patterning a film stack having a tunneling barrier layer disposed between a magnetic reference layer and a magnetic storage layer disposed on a substrate to remove a portion of the film stack from the substrate until an upper surface of the substrate is exposed, wherein the magnetic storage layer comprises a first magnetic storage sublayer, a second magnetic storage sublayer and a metallic intermediate layer therebetween; forming a sidewall passivation layer on sidewalls of the patterned film stack, the sidewall passivation layer having a vertical portion coplanar along a vertical axis normal to a major axis of the substrate and a horizontal portion extending outwardly from the vertical portion along the substrate such that the sidewall passivation layer covers the top surface of the substrate; forming an insulation layer comprising silicon oxide, where the portion of the film stack was removed during patterning, that is in direct contact with the sidewall passivation layer on the substrate such that the horizontal portion is between the insulation layer and the substrate such that

Assignees

Inventors

Classifications

  • Exchange coupled hard/soft multilayers, e.g. CoPt/Co or NiFe/CoSm (nanocomposite spring magnets H01F1/0579) · CPC title

  • containing iron or nickel ({H01F10/126} , H01F10/13, H01F10/16 take precedence) · CPC title

  • Materials of the active region · CPC title

  • H10N50/10Primary

    Magnetoresistive devices · CPC title

  • using elements in which the storage effect is based on magnetic spin effect · CPC title

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What does patent US12408557B2 cover?
Embodiments of the disclosure provide methods and apparatus for fabricating magnetic tunnel junction (MTJ) structures on a substrate in for spin-transfer-torque magnetoresistive random access memory (STT-MRAM) applications. In one example, a film stack utilized to form a magnetic tunnel junction structure on a substrate includes a pinned layer disposed on a substrate, wherein the pinned layer c…
Who is the assignee on this patent?
Applied Materials Inc
What technology area does this patent fall under?
Primary CPC classification H10N50/10. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Sep 02 2025 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 7 related publications on this page (citations in our corpus or others sharing the same primary CPC).