Selective film formation using a self-assembled monolayer

Patent metadata

Field	Value
Publication number	US-12406887-B2
Application number	US-202217854930-A
Country	US
Kind code	B2
Filing date	Jun 30, 2022
Priority date	Jul 6, 2021
Publication date	Sep 2, 2025
Grant date	Sep 2, 2025

Abstract

A method of processing a substrate that includes: loading the substrate in a processing system, the substrate including a metal having a metal surface and a first dielectric material having a dielectric material surface, the metal surface and the dielectric material surface being at the same level; etching the metal to form a recessed metal surface below the dielectric material surface; selectively forming a self-assembled monolayer (SAM) on the recessed metal surface using a spin-on process; and depositing a dielectric film including a second dielectric material on the dielectric material surface.

First claim

What is claimed is:

1. A method of processing a substrate, the method comprising:
loading the substrate in a processing system, the substrate comprising a metal having a metal surface and a first dielectric material having a dielectric material surface, the metal surface and the dielectric material surface being at the same level;
etching the metal to form a recessed metal surface below the dielectric material surface;
selectively forming a self-assembled monolayer (SAM) on the recessed metal surface using a spin-on process;
depositing a dielectric film comprising a second dielectric material on the dielectric material surface, wherein the depositing further deposits an additional dielectric film on the recessed metal surface; and
removing the additional dielectric film from the recessed metal surface to selectively form the dielectric film on the dielectric material surface and not on the recessed metal surface.

2. The method of claim 1 , wherein the etching the metal comprises exposing the substrate to a wet solution.

3. The method of claim 2 , wherein the wet solution comprises a citric acid solution.

4. The method of claim 1 , wherein the recessed metal surface is between about 0.3 nm and about 3 nm below the dielectric material surface.

5. The method of claim 1 , wherein the selectively forming the SAM comprises:
dispensing a solution comprising SAM molecules on the substrate while rotating the substrate, the SAM molecules comprising a carbon group, a bonding group coupled to the carbon group, a terminal group coupled to the carbon group that is opposite the bonding group;
annealing the substrate; and
dispensing a rinsing solution on the substrate.

6. The method of claim 5 , wherein the bonding group comprises a thiol, a silane, or a phosphonate.

7. The method of claim 1 , wherein the SAM is formed from SAM molecules comprising 1-octadecanethiol (CH3(CH2)16CH2SH), perfluorodecyltrichlorosilane (CF3(CF2)7CH2CH2SiCl3), perfluorodecanethiol (CF3(CF2)7CH2CH2SH), chlorodecyldimethylsilane (CH3(CH2)8CH2Si(CH3)2Cl), or tertbutyl(chloro)dimethylsilane ((CH3)3CSi(Cl)(CH3)2)).

8. The method of claim 1 , wherein the first dielectric material comprises SiO2 or a low-k material.

9. The method of claim 1 , wherein the second dielectric material comprises SiO2, a low-k material, or a high-k material.

10. A method of processing a substrate, the method comprising:
planarizing a surface of the substrate, the substrate comprising a first material and a second material, the planarizing exposing a first region comprising the first material and a second region comprising the second material;
selectively etching the first region to form a recess, the recess having an etched surface at a lower level than the second region of the planarized surface;
selectively forming a self-assembled monolayer (SAM) on the etched surface of the first region using a spin-on process; and
depositing a dielectric film on the second region of the planarized surface, wherein the depositing the dielectric film comprises:
adsorbing a metal-containing catalyst layer on the second region of the planarized surface; and
in the absence of any oxidizing and hydrolyzing agent, at a substrate temperature of approximately 150° C., or less, exposing the substrate to a process gas containing a silanol gas to deposit a SiO2 film.

11. The method of 10 , wherein the planarizing comprises a chemical mechanical planarization process.

12. The method of 10 , wherein the first material comprises Cu, Al, Ta, Ti, W, Ru, Co, Ni, or Mo, and the second material comprises Si.

13. The method of claim 10 , wherein the depositing the dielectric film includes a gas phase exposure.

14. The method of claim 10 , wherein the silanol gas is selected from the group consisting of tris(tert-pentoxy) silanol, tris(tert-butoxy) silanol, and bis(tert-butoxy)(isopropoxy) silanol.

15. The method of claim 10 , wherein the SAM is formed from SAM molecules comprising 1-octadecanethiol (CH3(CH2)16CH2SH), perfluorodecyltrichlorosilane (CF3(CF2)7CH2CH2SiC13), perfluorodecanethiol (CF3(CF2)7CH2CH2SH), chlorodecyldimethylsilane (CH3(CH2)8CH2Si(CH3)2Cl), or tertbutyl(chloro)dimethylsilane ((CH3)3CSi(Cl)(CH3)2)).

16. A method of processing a substrate, the method comprising:
forming a first plurality of recesses in a dielectric layer of the substrate, the dielectric layer comprising a first dielectric material;
conformally depositing a barrier layer within the first plurality of recesses;
depositing a metal over the barrier layer to fill the first plurality of recesses;
planarizing a top surface of the substrate, the planarized top surface comprising the first dielectric material, the barrier layer, and the metal;
selectively etching the metal to form an etched surface at a lower level than a remaining region of the planarized top surface;
selectively forming a self-assembled monolayer (SAM) on the etched surface using a spin-on process;
depositing a dielectric film on the remaining region of the planarized top surface; and
after depositing the dielectric film, removing the SAM to expose the etched surface, wherein the removing comprises exposing the substrate to a hydrogen-containing plasma.

17. The method of claim 16 , wherein the first plurality of recesses has a pitch size of 30 nm or less.

18. The method of claim 16 , wherein the SAM is formed from SAM molecules comprising 1-octadecanethiol (CH3(CH2)16CH2SH), perfluorodecyltrichlorosilane (CF3(CF2)7CH2CH2SiC13), perfluorodecanethiol (CF3(CF2)7CH2CH2SH), chlorodecyldimethylsilane (CH3(CH2)8CH2Si(CH3)2Cl), or tertbutyl(chloro)dimethylsilane ((CH3)3CSi(CI)(CH3)2)).

19. The method of claim 16 , wherein the selectively etching the metal comprises exposing the substrate to a wet solution, wherein the wet solution comprises a citric acid solution.

20. The method of claim 16 , wherein the etched surface at a lower level is between about 0.3 nm and about 3 nm below the remaining region of the planarized top surface.

Assignees

• Tokyo Electron Ltd

Inventors

• Triyoso Dina H
• Huli Lior
• Lemley Corey
• Clark Robert D
• Leusink Gerrit

Classifications

• H10P72/7618

  characterised by a movable susceptor, stage or support, others than those only rotating on their own vertical axis, e.g. susceptors on a rotating carrousel · CPC title

• H10P70/273

  the processing being a delineation of conductive layers, e.g. by RIE · CPC title

• H10P52/403

  of conductive or resistive materials · CPC title

• H10P50/667 Primary

  by liquid etching only · CPC title

• H10P14/6342

  Liquid deposition, e.g. spin-coating, sol-gel techniques or spray coating · CPC title