Substrate inspection apparatus and substrate inspection method

US12405226B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-12405226-B2
Application numberUS-202318493226-A
CountryUS
Kind codeB2
Filing dateOct 24, 2023
Priority dateJan 3, 2023
Publication dateSep 2, 2025
Grant dateSep 2, 2025

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

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A substrate inspection apparatus includes a light irradiator including an objective lens and a plurality of optical fibers. The objective lens is configured to irradiate light to an illumination area on a semiconductor substrate having a plurality of circuit pattern layers, the plurality of optical fibers are adjacent a periphery of the objective lens and are configured to irradiate the light to a peripheral area adjacent the illumination area. A light generator is configured to generate the light. The light generator is configured to change an irradiation angle of the light to selectively irradiate the light to one or more of the objective lens and the plurality of optical fibers. A light analyzer is configured to obtain images of the circuit pattern layers from the light reflected from the illumination area and the peripheral area. The light analyzer is configured to model each of the circuit pattern layers of the semiconductor substrate to obtain image models and to measure an overlay between the circuit pattern layers through the images and the image models.

First claim

Opening claim text (preview).

What is claimed is: 1. A substrate inspection apparatus, comprising: a light irradiator including an objective lens and a plurality of optical fibers, wherein the objective lens is configured to irradiate light to an illumination area on a semiconductor substrate having a plurality of circuit pattern layers, the plurality of optical fibers are adjacent a perimeter of the objective lens and are configured to irradiate the light to a peripheral area adjacent the illumination area; a light generator configured to generate the light, wherein the light generator is configured to change an irradiation angle of the light to selectively irradiate the light to one or more of the objective lens and the plurality of optical fibers; and a light analyzer configured to obtain images of the plurality of circuit pattern layers from the light reflected from the illumination area and the peripheral area, wherein the light analyzer is configured to model each of the plurality of circuit pattern layers of the semiconductor substrate to obtain image models and to measure an overlay between the plurality of circuit pattern layers with the images and the image models. 2. The substrate inspection apparatus of claim 1 , further comprising: a reflection mirror configured to reflect the light generated from the light generator to the objective lens or the plurality of optical fibers according to the irradiation angle. 3. The substrate inspection apparatus of claim 2 , further comprising: a first optical lens between the light generator and the reflection mirror configured to focus the light generated from the light generator onto the reflection mirror. 4. The substrate inspection apparatus of claim 1 , further comprising: a second optical lens between the light analyzer and the semiconductor substrate configured to focus the light reflected from the semiconductor substrate onto an image sensor of the light analyzer. 5. The substrate inspection apparatus of claim 1 , wherein the light generator includes at least one of a spatial light modulator (SLM), an LED array, and a digital micro mirror device. 6. The substrate inspection apparatus of claim 1 , wherein a numerical aperture of the objective lens is within a range of 0.1 to 0.3. 7. The substrate inspection apparatus of claim 1 , wherein each of the optical fibers irradiates the light onto the semiconductor substrate at a predetermined angle from a direction perpendicular to a surface of the semiconductor substrate, and the predetermined angle is within a range of 10 degrees to 50 degrees. 8. The substrate inspection apparatus of claim 1 , wherein the light analyzer is configured to collect the light reflected from the illumination area and the light reflected from the peripheral area and is configured to acquire the images of the plurality of circuit pattern layers. 9. The substrate inspection apparatus of claim 1 , wherein the light analyzer is configured to calculate a gradient between the images and the image models, and the light analyzer is configured to measure the overlay between the plurality of circuit pattern layers using a gradient descent method based on the gradient. 10. The substrate inspection apparatus of claim 1 , wherein the light analyzer is configured to measure the overlay using an amplitude and a phase of the light reflected from the illumination area and the peripheral area. 11. The substrate inspection apparatus of claim 1 , wherein the images have a three-dimensional profile of each of the plurality of circuit pattern layers. 12. The substrate inspection apparatus of claim 1 , wherein the light analyzer is configured to measure a height for each of the plurality of circuit pattern layers from the light reflected from the illumination area and the peripheral area to obtain the images. 13. A substrate inspection apparatus, comprising: a spatial light modulator configured to generate light while changing an irradiation angle; an objective lens configured to irradiate the light to an illumination area onto a semiconductor substrate that has a plurality of circuit pattern layers; a plurality of optical fibers adjacent a perimeter of the objective lens and configured to irradiate the light to a peripheral area surrounding the illumination area; a reflection mirror configured to reflect the light generated from the light generator to the objective lens or the plurality of optical fibers according to the irradiation angle; and a light analyzer configured to obtain images of the plurality of circuit pattern layers from the light reflected from the illumination area and the peripheral area. 14. The substrate inspection apparatus of claim 13 , further comprising: a reflection mirror configured to reflect the light generated from the light generator to the objective lens or the plurality of optical fibers according to the irradiation angle. 15. The substrate inspection apparatus of claim 14 , further comprising: a first optical lens between the light generator and the reflection mirror configured to focus the light generated from the light generator onto the reflection mirror. 16. The substrate inspection apparatus of claim 13 , wherein further comprising: a second optical lens between the light analyzer and the semiconductor substrate configured to focus the light reflected from the semiconductor substrate onto an image sensor of the light analyzer. 17. The substrate inspection apparatus of claim 13 , wherein each of the optical fibers irradiates the light onto the semiconductor substrate at a predetermined angle from a direction perpendicular to a surface of the semiconductor substrate, and the predetermined angle is within a range of 10 degrees to 50 degrees. 18. The substrate inspection apparatus of claim 13 , wherein the light analyzer is configured to collect the light reflected from the illumination area and the light reflected from the peripheral area and is configured to acquire images of the plurality of circuit pattern layers. 19. The substrate inspection apparatus of claim 18 , wherein the images have a three-dimensional profile of each of the plurality of circuit pattern layers. 20. A substrate inspection apparatus, comprising: a light generator configured to generate light while changing an irradiation angle to measure an overlay of a semiconductor substrate that has a plurality of circuit pattern layers; a light irradiator including an objective lens and a plurality of optical fibers, wherein the objective lens is configured to irradiate the light to an illumination area onto the semiconductor substrate, and the plurality of optical fibers are adjacent a perimeter of the objective lens and are configured to irradiate the light to a peripheral area adjacent the illumination area; a reflection mirror configured to reflect the light generated from the light generator to the objective lens or the plurality of optical fibers according to the irradiation angle; an optical lens between the light generator and the reflection mirror configured to focus the light generated from the light generator on the reflection mirror; and a light analyzer configured to obtain images of the plurality of circuit pattern layers from the light reflected from the illumination area and the peripheral area, wherein the light analyzer is configured to model each of the plurality of circuit pattern layers of the semiconductor substrate to calculate image models, and the light analyzer is configured to measure the overlay through the images and the image models.

Assignees

Inventors

Classifications

  • Structural properties, e.g. testing or measuring thicknesses, line widths, warpage, bond strengths or physical defects · CPC title

  • Irradiation branch, e.g. optical system details, illumination mode or polarisation control · CPC title

  • Production of measurement radiation, e.g. synchrotron, free-electron laser, plasma source or higher harmonic generation [HHG] · CPC title

  • Data analysis, e.g. filtering, weighting, flyer removal, fingerprints or root cause analysis · CPC title

  • for testing the alignment of axes {(means for centering or aligning a light guide within a ferrule G02B6/3834)} · CPC title

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What does patent US12405226B2 cover?
A substrate inspection apparatus includes a light irradiator including an objective lens and a plurality of optical fibers. The objective lens is configured to irradiate light to an illumination area on a semiconductor substrate having a plurality of circuit pattern layers, the plurality of optical fibers are adjacent a periphery of the objective lens and are configured to irradiate the light t…
Who is the assignee on this patent?
Samsung Electronics Co Ltd, Univ Boston
What technology area does this patent fall under?
Primary CPC classification G03F7/70633. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Sep 02 2025 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 11 related publications on this page (citations in our corpus or others sharing the same primary CPC).