In situ protective coating of chamber components for semiconductor processing

US12371781B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-12371781-B2
Application numberUS-201917309032-A
CountryUS
Kind codeB2
Filing dateOct 8, 2019
Priority dateOct 19, 2018
Publication dateJul 29, 2025
Grant dateJul 29, 2025

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

An in situ protective coating is deposited on surfaces of chamber components of a reaction chamber at high temperatures. The in situ protective coating may be deposited at a temperature greater than about 200° C. to provide a high quality coating that is resistant to certain types of halogen chemistries, such as fluorine-based species, chlorine-based species, bromine-based species, or iodine-based species. Subsequent coatings or layers may be deposited on the in situ protective coating having different etch selectivities than the underlying in situ protective coating. The in situ protective coating may be deposited throughout the reaction chamber to deposit on surfaces of the chamber components, including on chamber walls.

First claim

Opening claim text (preview).

What is claimed is: 1. A method comprising: introducing a first reactant in a gas phase into a reaction chamber to adsorb onto surfaces of a plurality of chamber components, wherein the plurality of chamber components are part of the reaction chamber; introducing a second reactant in a gas phase into the reaction chamber; controlling a radio-frequency (RF) signal supplied to the reaction chamber to cause a portion of a plasma glow discharge of the second reactant to form in areas outside an area between an upper electrode and a lower electrode, wherein the first reactant and the second reactant react to deposit a first protective coating on the surfaces of the plurality of chamber components without a wafer present in the reaction chamber; and depositing a second protective coating on a surface of the wafer in the reaction chamber and on the first protective coating in the reaction chamber, wherein the second protective coating is etched at a substantially greater etch rate than the first protective coating when exposed to a fluorine-based species, a chlorine-based species, a bromine-based species, and/or an iodine-based species. 2. The method of claim 1 , wherein a phase difference between a first phase of the RF signal supplied to the upper electrode and a second phase of the RF signal supplied to the lower electrode is between about 180 degrees out-of-phase and 0 degrees out-of-phase. 3. The method of claim 2 , wherein the phase difference is about 0 degrees out-of-phase. 4. The method of claim 1 , wherein the each of the first and second protective coating includes an oxide, a nitride, a carbide, or combinations thereof. 5. The method of claim 4 , wherein the each of the first and second protective coating includes silicon oxide (SiO 2 ), aluminum oxide (Al 2 O 3 ), zirconium oxide (ZrO 2 ), hafnium oxide (HfO 2 ), tin oxide (SnO 2 ), or silicon nitride (Si 3 N 4 ). 6. The method of claim 1 , wherein one or more materials of the plurality of chamber components include aluminum (Al). 7. The method of claim 1 , wherein the plurality of chamber components include at least chamber walls of the reaction chamber. 8. The method of claim 1 , further comprising: etching the second protective coating on the surface of the wafer and on the first protective coating, wherein the second protective coating is etched at a substantially greater rate than the first protective coating so as to substantially preserve the first protective coating during etching. 9. The method of claim 8 , wherein an etchant used for etching the second protective coating includes a fluorine-based species, a chlorine-based species, a bromine-based species, an iodine-based species, or combinations thereof. 10. The method of claim 8 , further comprising: re-depositing the first protective coating on the surfaces of the plurality of chamber components in the reaction chamber after etching the second protective coating. 11. The method of claim 1 , wherein the first reactant reacts with the second reactant to deposit the first protective coating on the surfaces of the plurality of chamber components at a temperature between 450° C. and 650° C. 12. A method comprising: depositing a first protective coating on surfaces of a plurality of chamber components in a reaction chamber without a wafer present in the reaction chamber, wherein the plurality of chamber components are part of the reaction chamber, wherein the first protective coating is deposited by plasma-enhanced chemical vapor deposition (PECVD) or plasma-enhanced atomic layer deposition (PEALD), wherein depositing the first protective coating by PEALD or PECVD comprises controlling a radio-frequency (RF) signal supplied to the reaction chamber to cause a portion of a plasma glow discharge to form in areas outside an area between an upper electrode and a lower electrode; and depositing a second protective coating on a surface of the wafer in the reaction chamber and on the first protective coating in the reaction chamber, wherein the second protective coating is etched at a substantially greater etch rate than the first protective coating when exposed to a fluorine-based species, a chlorine-based species, a bromine-based species, and/or an iodine-based species. 13. The method of claim 12 , further comprising: re-depositing the first protective coating on the surfaces of the plurality of chamber components in the reaction chamber after exposure to the fluorine-based species, chlorine-based species, bromine-based species, or iodine-based species. 14. The method of claim 12 , wherein a phase difference between a first phase of the RF signal supplied to the upper electrode and a second phase of the RF signal supplied to the lower electrode is about 0 degrees out-of-phase. 15. The method of claim 12 , wherein the each of the first and second protective coating includes silicon oxide (SiO 2 ), aluminum oxide (Al 2 O 3 ), zirconium oxide (ZrO 2 ), hafnium oxide (HfO 2 ), tin oxide (SnO 2 ), or silicon nitride (Si 3 N 4 ), and wherein one or more materials of the plurality of chamber components include aluminum (Al).

Assignees

Inventors

Classifications

  • characterised by the construction of the processing chambers, e.g. modular processing chambers · CPC title

  • characterised by the means for protecting vessels or internal parts, e.g. coatings · CPC title

  • of refractory metals or yttrium · CPC title

  • of aluminium, magnesium or beryllium · CPC title

  • Silicon dioxide · CPC title

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What does patent US12371781B2 cover?
An in situ protective coating is deposited on surfaces of chamber components of a reaction chamber at high temperatures. The in situ protective coating may be deposited at a temperature greater than about 200° C. to provide a high quality coating that is resistant to certain types of halogen chemistries, such as fluorine-based species, chlorine-based species, bromine-based species, or iodine-ba…
Who is the assignee on this patent?
Lam Res Corp
What technology area does this patent fall under?
Primary CPC classification H01J37/32477. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jul 29 2025 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 12 related publications on this page (citations in our corpus or others sharing the same primary CPC).