Storage device having fast cell information and operation method thereof

Patent metadata

Field	Value
Publication number	US-12360888-B2
Application number	US-202418590574-A
Country	US
Kind code	B2
Filing date	Feb 28, 2024
Priority date	Aug 24, 2023
Publication date	Jul 15, 2025
Grant date	Jul 15, 2025

Abstract

A storage device includes a non-volatile memory device configured to store fast cell information obtained from a threshold voltage distribution formed through a one-shot program for memory cells; and a storage controller configured to read the fast cell information from the non-volatile memory device during booting or initialization to perform mapping a fast cell area based on a fast cell management policy, wherein the fast cell information is acquired through the one-shot program performed in a test stage or a mass production evaluation stage, and is stored in the non-volatile memory device before a firmware of the storage controller is executed.

First claim

What is claimed is:

1. A storage device comprising:
a non-volatile memory device configured to store fast cell information obtained from a threshold voltage distribution formed through a one-shot program for memory cells; and
a storage controller configured to read the fast cell information from the non-volatile memory device during booting or initialization to perform mapping a fast cell area based on a fast cell management policy,
wherein the fast cell information is acquired through the one-shot program performed in a test stage or a mass production evaluation stage, and is stored in the non-volatile memory device before a firmware of the storage controller is executed.

2. The storage device of claim 1 , wherein the one-shot program corresponds to a single program loop that applies one program voltage pulse to the memory cells.

3. The storage device of claim 1 , wherein the fast cell information is stored in a security area of the non-volatile memory device.

4. The storage device of claim 1 , wherein the fast cell information corresponds to a number of memory cells or read data formed as a result of the one-shot program for memory cells whose threshold voltage is higher than a reference read voltage.

5. The storage device of claim 1 , wherein the storage controller comprises a fast cell manager configured to load the fast cell information into a working memory at a time of a booting or the initialization and perform the fast cell management policy based on the fast cell information.

6. The storage device of claim 5 , wherein the fast cell manager is further configured to map the fast cell area in a cell area of the non-volatile memory device based on the fast cell management policy.

7. The storage device of claim 6 , wherein the fast cell manager is further configured to allocate the fast cell area as a hot data area, based on the fast cell management policy, to designate the fast cell area as a write area for hot data, wherein a number of updates per hour of the hot data exceeds a reference value.

8. The storage device of claim 6 , wherein the fast cell manager is further configured to perform an adaptive core policy that controls the non-volatile memory device to provide a program voltage or erase voltage different from that of a normal cell area based on a write or erase request for the fast cell area being received.

9. A method of operating a storage device, the method comprising:
loading a firmware for driving the storage device into a working memory of a storage controller;
reading a fast cell information programmed in a security area of a non-volatile memory device;
loading the fast cell information into the working memory;
mapping a fast cell area based on the loaded fast cell information; and
applying a fast cell management policy when accessing the mapped fast cell area,
wherein the fast cell information is provided in a programmed state in the security area of the non-volatile memory device before an initialization of the firmware.

10. The method of claim 9 , further comprising:
generating the fast cell information corresponding to first memory cells of the non-volatile memory device through a one-shot program; and
programming the fast cell information into the security area.

11. The method of claim 10 , wherein threshold voltages of the first memory cells are higher than a reference read voltage.

12. The method of claim 11 , wherein the fast cell information corresponds to a value calculated by counting a number of fast cells on a word line unit or a memory block unit, or the fast cell information corresponds to data values read on the word line unit or the memory block unit.

13. The method of claim 9 , wherein the mapping comprises allocating the fast cell area to a hot data area, and allocating a normal cell area to a cold data area.

14. The method of claim 9 , wherein the mapping comprises allocating the fast cell area a management area having a first program voltage or a first erase voltage that is different from a second program voltage or a second erase voltage of a normal cell area.

15. The method of claim 14 , further comprising, based on a request for the access to the fast cell area occurring, applying the first program voltage or the first erase voltage to a word line of the fast cell area, wherein the first program voltage and the first erase voltage are respectively lower than the second program voltage and the second erase voltage used for the normal cell area.

16. A storage device comprising:
a non-volatile memory device storing a fast cell information; and
a storage controller configured to:
load and execute a firmware in a working memory during booting or initialization,
read the fast cell information from the non-volatile memory device, and apply a fast cell management policy based on the fast cell information,

wherein the fast cell information is generated in a test stage or a mass production evaluation stage of the non-volatile memory device to be provided in a programmed state in the non-volatile memory device before the firmware is executed.

17. The storage device of claim 16 , wherein the fast cell information is obtained through a one-shot program performed in the test stage or the mass production evaluation stage.

18. The storage device of claim 17 , wherein the one-shot program corresponds to a single program loop in which single program voltage pulse is applied to memory cells of the non-volatile memory device.

19. The storage device of claim 16 , wherein a fast cell area containing a fast cell is allocated as a hot data area according to the fast cell management policy, and
wherein the hot data area corresponds to a write area of hot data whose number of updates per hour exceeds a reference value.

20. The storage device of claim 16 , wherein the fast cell management policy comprises an adaptive core policy that controls the non-volatile memory device to provide a different program voltage or erase voltage than that of a normal cell area based on a write request or an erase request being received for a fast cell area.

Assignees

• Samsung Electronics Co Ltd

Inventors

• Kang Woohyun
• Lee Jinyoung
• Kim Jisoo
• Moon Sangkwon
• Oh Hyunkyo
• Lim Donghoo
• Jeong Jin Gu

Classifications

• G06F2212/1016

  Performance improvement · CPC title

• G06F2212/1032

  Reliability improvement, data loss prevention, degraded operation etc · CPC title

• G06F3/0658

  Controller construction arrangements · CPC title

• G06F3/0604

  Improving or facilitating administration, e.g. storage management · CPC title

• G06F3/0679

  Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP] · CPC title