Fixed pattern noise compensation techniques for capacitive fingerprint sensors
US-9939400-B1 · Apr 10, 2018 · US
US12356813B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-12356813-B2 |
| Application number | US-202217727945-A |
| Country | US |
| Kind code | B2 |
| Filing date | Apr 25, 2022 |
| Priority date | Apr 26, 2021 |
| Publication date | Jul 8, 2025 |
| Grant date | Jul 8, 2025 |
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An electro-optical device includes a DA conversion circuit to convert 10 bits of data into an analog voltage output to a data line. The DA conversion circuit includes a first DA conversion circuit to convert upper 5 bits into a voltage and outputs converted voltage to the data line, a second DA conversion circuit to convert lower 5 bits into a voltage and outputs converted voltage to a relay line, and a coupling capacitance including one end electrically coupled to the second DA conversion circuit and another end electrically coupled to the data line, wherein the first DA conversion circuit includes a capacitance element corresponding to the upper 5 bits and is arranged in the Y direction along the data line, and the second DA conversion circuit includes a capacitance element corresponding to the lower 5 bits and is arranged in the Y direction along the data line.
Opening claim text (preview).
What is claimed is: 1. An electro-optical device comprising: a display element provided corresponding to an intersection of a data line and a scanning line; and a Digital-to-Analog (DA) conversion circuit, wherein the DA conversion circuit includes: a first DA conversion circuit configured to convert upper two or more bits among a plurality of bits into a first gradation voltage corresponding to the upper two or more bits, and apply the first gradation voltage to the data line; a second DA conversion circuit configured to convert a part or all of the bits excluding the upper two or more bits among the plurality of bits into a second gradation voltage that reflects the part or all of the bits excluding the upper two or more bits; and a coupling capacitance including one end electrically coupled to the second DA conversion circuit and another end electrically coupled to the data line, the first DA conversion circuit includes an upper capacitance element portion including a first capacitance element and a second capacitance element corresponding to each of the upper two or more bits, the first capacitance element and the second capacitance element are arranged in a direction along the data line, the second DA conversion circuit includes a lower capacitance element portion including a third capacitance element and a fourth capacitance element corresponding to each of the part or all of the bits excluding the upper two or more bits, and the third capacitance element and the fourth capacitance element are arranged in a direction along the data line. 2. The electro-optical device according to claim 1 , wherein the coupling capacitance is provided between a relay line to which the second gradation voltage converted by the second DA conversion circuit is applied and the data line. 3. The electro-optical device according to claim 2 , wherein the relay line is provided in a direction along the data line, and the data line and the relay line are arranged in a non-parallel manner. 4. The electro-optical device according to claim 1 , wherein a wiring line for supplying a signal to one end of the upper capacitance element portion and the data line configured to output a signal from another end of the upper capacitance element portion are provided in different wiring layers. 5. The electro-optical device according to claim 4 , wherein the data line is provided between two shield lines having a fixed potential. 6. The electro-optical device according to claim 1 , wherein the upper capacitance element portion, the coupling capacitance, and the lower capacitance element portion are arranged in a direction along the data line, and the coupling capacitance is provided between the upper capacitance element portion and the lower capacitance element portion. 7. The electro-optical device according to claim 1 , wherein a width of the first DA conversion circuit, the coupling capacitance, and the second DA conversion circuit in a direction along the scanning line is greater than a first width between the data line and a data line disposed adjacent to the data line in a direction along the scanning line, and is less than six times the first width. 8. An electronic apparatus comprising the electro-optical device according to claim 1 .
with pixel circuitry controlling the current through the light-emitting element · CPC title
Details of drivers for data electrodes, the drivers handling digital grey scale data, e.g. use of D/A converters · CPC title
Precharge or discharge of pixel before applying new pixel voltage · CPC title
with additional control of the display period without amending the charge stored in a pixel memory, e.g. by means of additional select electrodes · CPC title
forming a memory circuit, e.g. a dynamic memory with one capacitor · CPC title
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