Pixel circuit and display panel
US-2024428730-A1 · Dec 26, 2024 · US
US9378676B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9378676-B2 |
| Application number | US-201414322408-A |
| Country | US |
| Kind code | B2 |
| Filing date | Jul 2, 2014 |
| Priority date | Jul 2, 2013 |
| Publication date | Jun 28, 2016 |
| Grant date | Jun 28, 2016 |
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Provided is an active matrix display device using an organic EL panel including: a plurality of pixel circuits each including an organic light emitting diode arranged in a pixel region of the organic EL panel and a plurality of transistors configured to drive the organic light emitting diode; a plurality of scanning lines arranged along a first direction in the organic EL panel; and a plurality of data lines arranged along a second direction that is orthogonal to the first direction. In at least one set of pixel circuits that are adjacent in the first direction, gate electrodes and impurity diffusion regions of the plurality of transistors have an axisymmetric layout. Gate electrodes of at least one set of transistors that are symmetrically arranged in the at least one set of pixel circuits are integrated.
Opening claim text (preview).
What is claimed is: 1. A display device, which is an active matrix display device using an organic EL (electroluminescence) panel, comprising: a plurality of pixel circuits each including an organic light emitting diode arranged in a pixel region of the organic EL panel and a plurality of transistors configured to drive the organic light emitting diode, the pixel circuits of at least one set of the pixel circuits being adjacent in a first direction; a plurality of scanning lines arranged along the first direction in the organic EL panel; and a plurality of data lines arranged along a second direction that is orthogonal to the first direction in the organic EL panel, wherein gate electrodes and impurity diffusion regions of the plurality of transistors have an axisymmetric layout in the at least one set of pixel circuits, gate electrodes of at least one set of transistors that are symmetrically arranged in the at least one set of pixel circuits are integrated, the integrated gate electrodes of the at least one set of transistors that are symmetrically arranged in the at least one set of pixel circuits that are adjacent in the first direction are connected to a single line at one connection point, the connection point being at a center of the gate electrodes, and in the first direction, the integrated gate electrodes form a mirror image about the connection point. 2. The display device according to claim 1 , further comprising: a shielding line arranged between two data lines connected respectively to the one set of pixel circuits that are adjacent in the first direction. 3. An electronic apparatus comprising the display device according to claim 2 . 4. The display device according to claim 1 , wherein the plurality of pixel circuits each include: a first transistor configured to supply a current to the organic light emitting diode in accordance with a potential of a capacitor connected to a gate of the first transistor; and a second transistor configured to connect the gate of the first transistor to a single data line in accordance with a potential of a scanning line connected to a gate of the second transistor. 5. The display device according to claim 4 , wherein gate electrodes of second transistors of the one set of pixel circuits that are adjacent in the first direction are integrated. 6. An electronic apparatus comprising the display device according to claim 5 . 7. The display device according to claim 4 , wherein the plurality of pixel circuits each further include: a third transistor configured to open and close connection between the gate and drain of the first transistor in accordance with a signal supplied to a gate of the third transistor; a fourth transistor configured to open and close connection between the drain of the first transistor and an anode of the organic light emitting diode in accordance with a signal supplied to a gate of the fourth transistor; and a fifth transistor configured to open and close connection between the anode of the organic light emitting diode and a reset potential line in accordance with a signal supplied to a gate of the fifth transistor. 8. The display device according to claim 7 , wherein in first to third pixel circuits of the at least one set of pixel circuits that are adjacent in the first direction, gate electrodes of second transistors of the second and third pixel circuits are integrated, gate electrodes of third transistors of the second and third pixel circuits are integrated, gate electrodes of fourth transistors of the first and second pixel circuits are integrated, and gate electrodes of fifth transistors of the second and third pixel circuits are integrated. 9. An electronic apparatus comprising the display device according to claim 8 . 10. An electronic apparatus comprising the display device according to claim 7 . 11. The display device according to claim 4 , further comprising a shielding line arranged between two lines connected respectively to gate electrodes of first transistors of the one set of pixel circuits that are adjacent in the first direction. 12. An electronic apparatus comprising the display device according to claim 11 . 13. An electronic apparatus comprising the display device according to claim 4 . 14. An electronic apparatus comprising the display device according to claim 1 . 15. A display device, which is an active matrix display device using an organic EL (electroluminescence) panel, comprising: a plurality of pixel circuits each including an organic light emitting diode arranged in a pixel region of the organic EL panel and a plurality of transistors configured to drive the organic light emitting diode, a first pixel circuit, a second pixel circuit, and a third pixel circuit of the plurality of pixel circuits being consecutively arranged in a first direction; a plurality of scanning lines arranged along the first direction in the organic EL panel; and a plurality of data lines arranged along a second direction that is orthogonal to the first direction in the organic EL panel, the first pixel circuit and the second pixel circuit being symmetrically arranged about first gate electrodes of at least a first set of transistors of the first pixel circuit and the second pixel circuit, the first gate electrodes being integrated, the integrated first gate electrodes being connected to a single line at a first connection point, the first connection point being at a center of the first gate electrodes, in the first direction, the integrated first gate electrodes forming a mirror image about the first connection point, the second pixel circuit and the third pixel circuit being symmetrically arranged about second gate electrodes of at least a second set of transistors of the second pixel circuit and the third pixel circuit, the second gate electrodes being integrated, the integrated second gate electrodes being connected to a single line at a second connection point, the second connection point being at a center of the second gate electrodes, and in the first direction, the integrated second gate electrodes forming a mirror image about the second connection point.
Precharge or discharge of column electrodes before or after applying exact column voltages · CPC title
in which the data driver supplies a variable data current for setting the current through, or the voltage across, the light-emitting elements · CPC title
Details of timing specific for flat panels, other than clock recovery · CPC title
used for counteracting undesired variations, e.g. feedback or autozeroing · CPC title
by monitoring each display pixel · CPC title
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