Method for annealing a gate insulation layer on a wide band gap semiconductor substrate

Patent metadata

Field	Value
Publication number	US-12341012-B2
Application number	US-202217666654-A
Country	US
Kind code	B2
Filing date	Feb 8, 2022
Priority date	Apr 4, 2018
Publication date	Jun 24, 2025
Grant date	Jun 24, 2025

Abstract

A method for forming a wide band gap semiconductor device is provided. The method includes forming a gate insulation layer on a wide band gap semiconductor substrate and annealing the gate insulation layer using at least a first reactive gas species and a second reactive gas species, wherein the first reactive gas species differs from the second reactive gas species. The method can include forming a gate electrode on the gate insulation layer after annealing the gate insulation layer.

First claim

What is claimed is:

1. A method for forming a wide band gap semiconductor device, the method comprising:
forming a gate insulation layer on a wide band gap semiconductor substrate;
performing a first annealing process during which the gate insulation layer is annealed using at least a first reactive gas species, wherein the first annealing process is performed in a reactive gas atmosphere comprising at least 0.1 vol % of the first reactive gas species and at most 0.1 vol % of the second reactive gas species;
performing a second annealing process separate from the first annealing process and during which the gate insulation layer is annealed using at least a second reactive gas species, wherein the second annealing process is performed in a reactive gas atmosphere comprising at least 0.1 vol % of the second reactive gas species and at most 0.1 vol % of the first reactive gas species;
diluting the first reactive gas species with an inert gas so that a volume percent of the first reactive gas species is at least 1 vol % and at most 50 vol %; and
annealing the gate insulation layer in an inert gas atmosphere,
wherein the first reactive gas species differs from the second reactive gas species,
wherein the first reactive gas species is nitric oxide.

2. The method of claim 1 , wherein the second reactive gas species is one of nitrous oxide, hydrogen, ammonia, hydrogen peroxide, nitric acid, water vapor, phosphoryl chloride, and oxygen.

3. The method of claim 1 , further comprising:
diluting the second reactive gas species with an inert gas so that a volume percent of the second reactive gas species is at least 0.1 vol % and at most 10 vol %, and wherein the second reactive gas species is ammonia.

4. The method of claim 1 , wherein the annealing of the gate insulation layer in the inert gas atmosphere comprises:
heating the gate insulation layer in the inert gas atmosphere at a temperature lower than 1200° C. to reduce a hydrogen concentration within the gate insulation layer.

5. The method of claim 4 , wherein the second reactive gas species comprises ammonia, and wherein a volume percent of the second reactive gas species is at least 0.1 vol %.

6. The method of claim 4 , wherein the first reactive gas species comprises at least 5 vol % nitric oxide, wherein the inert gas atmosphere comprises at least 90% nitrogen, and wherein a duration of the annealing in the inert gas atmosphere is shorter than a duration of the annealing in the first reactive gas species and/or the second reactive gas species.

7. The method of claim 4 , wherein the inert gas atmosphere has a concentration of oxygen of at most 0.5 vol %.

8. The method of claim 4 , wherein a duration of each annealing of the gate insulation layer is at least 10 minutes and at most 600 minutes.

9. The method of claim 4 , wherein an annealing temperature of each annealing of the gate insulation layer is at least 600° C. and at most 1200° C.

10. The method of claim 1 , further comprising:
before the gate insulation layer is annealed, heating the gate insulation layer in an inert gas atmosphere at a temperature of at least 950° C.

11. The method of claim 1 , further comprising:
after the gate insulation layer is annealed, forming a gate electrode on the gate insulation layer.

12. The method of claim 11 , wherein the gate electrode is a gate trench electrode that extends from a surface of the wide band gap semiconductor substrate into the wide band gap semiconductor substrate.

13. The method of claim 1 , wherein the wide band gap semiconductor substrate is a silicon carbide substrate.

14. The method of claim 1 , wherein the gate insulation layer is a silicon dioxide layer.

15. A method for forming a wide band gap semiconductor device, the method comprising:
forming a gate insulation layer on a wide band gap semiconductor substrate;
performing a first annealing process during which the gate insulation layer is annealed using at least a first reactive gas species, wherein the first annealing process is performed in a reactive gas atmosphere comprising at least 0.1 vol % of the first reactive gas species and at most 0.1 vol % of the second reactive gas species;
performing a second annealing process separate from the first annealing process and during which the gate insulation layer is annealed using at least a second reactive gas species, wherein the second annealing process is performed in a reactive gas atmosphere comprising at least 0.1 vol % of the second reactive gas species and at most 0.1 vol % of the first reactive gas species;
diluting the second reactive gas species with an inert gas so that a volume percent of the second reactive gas species is at least 0.1 vol % and at most 10 vol %; and
annealing the gate insulation layer in an inert gas atmosphere,
wherein the first reactive gas species differs from the second reactive gas species,
wherein the second reactive gas species is ammonia.

16. The method of claim 15 , further comprising:
after the gate insulation layer is annealed, forming a gate electrode on the gate insulation layer.

17. The method of claim 16 , wherein the gate electrode is a gate trench electrode that extends from a surface of the wide band gap semiconductor substrate into the wide band gap semiconductor substrate.

18. The method of claim 15 , wherein the annealing of the gate insulation layer in the inert gas atmosphere comprises:
heating the gate insulation layer in the inert gas atmosphere at a temperature lower than 1200° C. to reduce a hydrogen concentration within the gate insulation layer.

19. The method of claim 18 , wherein the first reactive gas species comprises nitric oxide, and wherein a volume percent of the first reactive gas species is at least 0.1 vol %.

20. The method of claim 18 , wherein the first reactive gas species comprises at least 5 vol % nitric oxide, wherein the inert gas atmosphere comprises at least 90% nitrogen, and wherein a duration of the annealing in the inert gas atmosphere is shorter than a duration of the annealing in the first reactive gas species and/or the second reactive gas species.

21. The method of claim 18 , wherein the inert gas atmosphere has a concentration of oxygen of at most 0.5 vol %.

22. The method of claim 18 , wherein a duration of each annealing of the gate insulation layer is at least 10 minutes and at most 600 minutes.

23. The method of claim 18 , wherein an annealing temperature of each annealing of the gate insulation layer is at least 600° C. and at most 1200° C.

Assignees

• Infineon Technologies Ag

Inventors

• Aichinger Thomas
• Rescher Gerald
• Stadtmueller Michael

Classifications

• H10P14/69215

  the material being a silicon oxide, e.g. SiO2 · CPC title

• H10P14/6529

  by exposure to a gas or vapour · CPC title

• H10P14/6334

  using decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition (deposition by physical ablation of a target H10P14/6329) · CPC title

• H10D64/01366 Primary

  the semiconductor being silicon carbide · CPC title

• H10P14/6526

  introduced into an oxide material, e.g. changing SiO to SiON · CPC title