Storage device and a power management device

Patent metadata

Field	Value
Publication number	US-12339722-B2
Application number	US-202217898588-A
Country	US
Kind code	B2
Filing date	Aug 30, 2022
Priority date	Dec 6, 2021
Publication date	Jun 24, 2025
Grant date	Jun 24, 2025

Abstract

A storage device including: a controller configured to be connected to an external host through an interface; a plurality of memory devices configured to store data; and a power management device configured to output an internal power voltage for an operation of the plurality of memory devices using an external power voltage received through the interface and having a flag signal pad for receiving a flag signal from the controller when the controller fails to recognize at least one of the plurality of memory devices, wherein, when the flag signal is received, the power management device changes a slope of the internal power voltage, and supplies the internal power voltage having the changed slope to the plurality of memory devices.

First claim

What is claimed is:

1. A storage device, comprising:
a controller configured to be connected to an external host through an interface;
a plurality of memory devices configured to store data; and
a power management device configured to output an internal power voltage for an operation of the plurality of memory devices using an external power voltage received through the interface and having a flag signal pad for receiving a flag signal from the controller when the controller fails to recognize at least one of the plurality of memory devices,
wherein, when the flag signal is received, the power management device changes a slope of the internal power voltage, and supplies the internal power voltage having the changed slope to the plurality of memory devices.

2. The storage device of claim 1 , wherein
the power management device includes a temperature sensor for detecting a temperature and a power circuit for changing the slope of the internal power voltage, and
a data table that stores a defective rate of the plurality of memory devices according to the temperature and the slope of the internal power voltage.

3. The storage device of claim 2 , wherein, when the flag signal is received, the power management device changes the slope of the internal power voltage so that the internal power voltage increases more than prior to the flag signal being received.

4. The storage device of claim 3 , wherein the power circuit changes the slope of the internal power voltage as the temperature is decreased.

5. The storage device of claim 1 , wherein, when the flag signal is received, the power management device turns off a power of the plurality of memory devices before changing the slope of the internal power voltage.

6. The storage device of claim 5 , wherein the power management device supplies the internal power voltage having the changed slope to the plurality of memory devices, and when the controller recognizes the plurality of memory devices, the power management device sets the changed slope as a default slope of the internal power voltage.

7. The storage device of claim 6 , wherein the power management device stores the changed slope as the default slope in a data table.

8. The storage device of claim 1 , wherein the plurality of memory devices directly receive an input/output power voltage for an input/output operation from the external host through the interface, and a level of the input/output power voltage is lower than a level of the internal power voltage.

9. The storage device of claim 1 , wherein, when the controller does not recognize at least one of the plurality of memory devices, while the power management device supplies the internal power voltage to the plurality of memory devices, after sequentially applying slopes corresponding to the internal power voltage stored in a data table to the internal power voltage, the controller determines the plurality of memory devices to be defective.

Assignees

• Samsung Electronics Co Ltd

Inventors

• Kim Daewon
• Oh Seungjun
• Cho Junwoo

Classifications

• G06F11/1417

  Boot up procedures · CPC title

• G06F1/26 Primary

  Power supply means, e.g. regulation thereof (for memories G11C) · CPC title

• G06F9/4411

  Configuring for operating with peripheral devices; Loading of device drivers · CPC title

• G06F9/4401

  Bootstrapping (security arrangements therefor G06F21/57) · CPC title

• G06F1/266

  Arrangements to supply power to external peripherals either directly from the computer or under computer control, e.g. supply of power through the communication port, computer controlled power-strips · CPC title