Thin film transistor, semiconductor substrate and X-ray flat panel detector

Patent metadata

Field	Value
Publication number	US-12336227-B2
Application number	US-202117763297-A
Country	US
Kind code	B2
Filing date	Apr 30, 2021
Priority date	Jun 24, 2020
Publication date	Jun 17, 2025
Grant date	Jun 17, 2025

Abstract

A thin film transistor includes a gate electrode, an active layer, a gate insulating layer located between the gate electrode and the active layer, and a source electrode and a drain electrode electrically connected to the active layer. The active layer includes a channel layer and at least one channel protection layer; a material of each of the channel layer and the at least one channel protection layer is a metal oxide semiconductor material. The at least one channel protection layer is a crystallizing layer, and metal elements of the at least one channel protection layer include non-rare earth metal elements including In, Ga, Zn and Sn.

First claim

What is claimed is:

1. A thin film transistor, comprising: a gate electrode, an active layer, a gate insulating layer located between the gate electrode and the active layer, and a source electrode and a drain electrode both electrically connected to the active layer, wherein,
the active layer comprises a channel layer and at least one channel protection layer which are overlapped in a stacking direction, and a material of each of the channel layer and the at least one channel protection layer is a metal oxide semiconductor material,
the at least one channel protection layer is a crystallizing layer, and metal elements of the at least one channel protection layer comprise non-rare earth metal elements including In, Ga, Zn and Sn, wherein
the at least one channel protection layer comprises a first channel protection layer located at a side of the channel layer close to the source electrode and the drain electrode,
the channel layer comprises a first channel portion adjacent to the first channel protection layer and a second channel portion located at a side of the first channel portion away from the first channel protection layer in the stacking direction,
an absolute value of an energy band gap of the first channel portion is smaller than an absolute value of an energy band gap of the first channel protection layer, and an absolute value of an energy band gap of the second channel portion is smaller than the absolute value of the energy band gap of the first channel portion,
the first channel portion at least comprises a first surface of the channel layer that is in direct contact with the first channel protection layer, the first channel portion comprises at least one rare earth metal element that is as same as the at least one rare earth metal element in the first channel protection layer,
the second channel portion at least comprises a second surface of the channel layer away from the first channel protection layer, and the second channel portion does not contain any rare earth metal element that is as same as the at least one rare earth metal element in the first channel protection layer, and
metal elements of the channel layer comprise In, Ga and Zn.

2. The thin film transistor according to claim 1 , wherein
the metal elements of the first channel protection layer further comprise at least one rare earth metal element.

3. The thin film transistor according to claim 1 , wherein
the first channel portion serves as a transition layer between the second channel portion and the first channel protection layer.

4. The thin film transistor according to claim 1 , wherein the at least one channel protection layer is formed by depositing a target material.

5. The thin film transistor according to claim 2 , wherein the at least one rare earth metal element of the first channel protection layer is selected from the group consisting of Pr, Ir, Tb and Sm.

6. The thin film transistor according to claim 5 , wherein the at least one rare earth metal element of the first channel protection layer comprises two selected from the group consisting of Pr, Ir, Tb and Sm,
and/or,
wherein the at least one rare earth metal element of the first channel protection layer comprises Pr and Sm.

7. The thin film transistor according to claim 1 , wherein,
the at least one rare earth metal element of the first channel protection layer comprises a first rare earth metal element and a second rare earth metal element different from each other, and the at least one rare earth metal element in the first channel portion comprises the first rare earth metal element but does not comprise the second rare earth metal element.

8. The thin film transistor according to claim 3 , wherein a difference between the absolute value of any one of the energy band gap of the first channel portion and the energy band gap of the second channel portion, and the absolute value of the energy band gap of the first channel protective layer, is greater than zero and smaller than or equal to 1.5 eV.

9. The thin film transistor according to claim 1 , wherein, in the at least one channel protection layer, an atomic percentage of at least one of the non-rare earth metal elements relative to all of the metal elements is greater than or equal to 40%.

10. The thin film transistor according to claim 1 , wherein the channel layer is a crystallizing layer or an amorphous layer.

11. The thin film transistor according to claim 1 , wherein, in the metal oxide semiconductor material of the at least one channel protection layer, a species number of the non-rare earth metal elements is N, and a ratio of an atomic number of any one of the non-rare earth metal elements to a sum of atomic numbers of other non-rare earth metal elements is greater than or equal to 1/N.

12. The thin film transistor according to claim 2 , wherein the at least one channel protection layer further comprises a second channel protection layer located at a side of the channel layer away from the source electrode and the drain electrode.

13. The thin film transistor according to claim 1 , wherein, in the stacking direction, a thickness of the at least one channel protection layer is greater than or equal to a thickness of the channel layer,
and/or,
a carrier concentration of the at least one channel protection layer is smaller than a carrier concentration of the channel layer.

14. The thin film transistor according to claim 1 , wherein, in the stacking direction,
a thickness of the channel layer is in a range of 1 nm to 50 nm;
and/or,
a thickness of the at least one channel protection layer is in a range of 20 nm to 100 nm.

15. A semiconductor substrate, comprising a base substrate and a thin film transistor located on the base substrate, wherein the thin film transistor is the thin film transistor according to claim 1 .

16. An X-ray flat panel detector, comprising the thin film transistor according to claim 1 .

17. A thin film transistor, comprising a gate electrode, a gate insulating layer, an active layer, and a source electrode and a drain electrode both electrically connected to the active layer, wherein,
the active layer comprises a channel layer and at least one channel protection layer which are overlapped in a stacking direction, and a material of each of the channel layer and the at least one channel protection layer is a metal oxide semiconductor material,
the at least one channel protection layer is a crystalizing layer, and metal elements of the at least one channel protection layer comprise non-rare earth metal elements and at least one rare earth metal element, wherein the non-rare earth metal elements comprise at least two selected from the group consisting of In, Ga, Zn and Sn, and the at least two selected from the group consisting of In, Ga, Zn and Sn comprise at least one of In and Zn, wherein
the at least one channel protection layer comprises a first channel protection layer located at a side of the channel layer close to the source electrode and the drain electrode,
the channel layer comprises a first channel portion adjacent to the first channel protection layer and a second channel portion located at a side of the first channel portion away from the first channel protection layer in the stacking direction,
an absolute value of an energy band gap of the first channel portion is smaller than an absolute value of an energy band gap of the first channel protection layer, and an absolute value of an energy band gap of the second channel portion is smaller than the absolute value of the energy band gap of the first channel portion,
the firs

Assignees

• Boe Technology Group Co Ltd

Inventors

• Huang Jie
• Li Zhengliang
• Ning ce
• Hu hehe
• Yao Nianqi
• Zhao Kun
• Liu Fengjuan
• Zhou Tianmin
• Lei Liping

Classifications

• H10D30/506

  having different thicknesses, sizes or shapes · CPC title

• H10D30/6757 Primary

  characterised by the structure of the channel, e.g. transverse or longitudinal shape or doping profile (TFTs having channel structures for preventing kink or snapback effects H10D30/6708; TFTs having lightly-doped source or drain extensions H10D30/6715) · CPC title

• H10D99/00 Primary

  Subject matter not provided for in other groups of this subclass · CPC title

• H10D86/423

  comprising semiconductor materials not belonging to the Group IV, e.g. InGaZnO · CPC title

• H10D86/0221 Primary

  comprising manufacture, treatment or patterning of TFT semiconductor bodies · CPC title