Semiconductor device and method for manufacturing the same

Patent metadata

Field	Value
Publication number	US-2018254352-A1
Application number	US-201815904867-A
Country	US
Kind code	A1
Filing date	Feb 26, 2018
Priority date	Mar 3, 2017
Publication date	Sep 6, 2018
Grant date	—

Abstract

A semiconductor device with favorable electrical characteristics is to be provided. A highly reliable semiconductor device is to be provided. A semiconductor device with lower power consumption is to be provided. The semiconductor device includes a gate electrode, a first insulating layer over the gate electrode, a metal oxide layer over the first insulating layer, a pair of electrodes over the metal oxide layer, and a second insulating layer over the pair of electrodes. The first insulating layer includes a first region and a second region. The first region has a region being in contact with the metal oxide layer and containing more oxygen than the second region. The second region has a region containing more nitrogen than the first region. The metal oxide layer has at least a concentration gradient of oxygen in a thickness direction, and the concentration gradient becomes high on a first region side and on a second region side.

First claim

What is claimed is:

1 . A semiconductor device comprising:
a gate electrode; a first insulating layer over the gate electrode; a metal oxide layer over the first insulating layer; a pair of electrodes over the metal oxide layer; and a second insulating layer over the pair of electrodes, wherein the metal oxide layer comprises In, an element M, and zinc,
wherein the element M is at least one of gallium, aluminum, silicon, boron, yttrium, tin, copper, vanadium, beryllium, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, and magnesium,
wherein the first insulating layer comprises a first region and a second region, wherein the first region comprises a region in contact with the metal oxide layer and contains more oxygen than the second region, wherein the second region comprises a region containing more nitrogen than the first region, wherein the metal oxide layer has at least a concentration gradient of oxygen in a thickness direction, and wherein the concentration gradient becomes high on a first region side and on a second insulating layer side.

2 . The semiconductor device according to claim 1 , wherein the first region comprises a region with a thickness greater than or equal to 1 nm and less than or equal to 10 nm.

3 . The semiconductor device according to claim 1 , wherein the metal oxide layer has an atomic ratio of M greater than or equal to 0.5 and less than or equal to 1.5 and an atomic ratio of Zn greater than or equal to 0.1 and less than or equal to 2 when an atomic ratio of In is 1.

4 . The semiconductor device according to claim 1 , wherein the metal oxide layer has an atomic ratio of M greater than or equal to 1.5 and less than or equal to 2.5 and an atomic ratio of Zn greater than or equal to 2 and less than or equal to 4 when an atomic ratio of In is 4.

5 . The semiconductor device according to claim 1 , wherein the metal oxide layer has an atomic ratio of M greater than or equal to 0.5 and less than or equal to 1.5 and an atomic ratio of Zn greater than or equal to 5 and less than or equal to 7 when an atomic ratio of In is 5.

6 . The semiconductor device according to claim 1 ,
wherein the metal oxide layer comprises a first metal oxide layer and a second metal oxide layer over the first metal oxide layer, and wherein the first metal oxide layer comprises a region having lower crystallinity than the second metal oxide layer.

7 . The semiconductor device according to claim 1 ,
wherein the metal oxide layer comprises a first metal oxide layer, a second metal oxide layer over the first metal oxide layer, and a third metal oxide layer in contact with a bottom of the first metal oxide layer, and wherein the first metal oxide layer comprises a region having lower crystallinity than one or both of the second metal oxide layer and the third metal oxide layer.

8 . The semiconductor device according to claim 1 , further comprising a third insulating layer over the second insulating layer,
wherein the third insulating layer comprises silicon and nitrogen.

9 . The semiconductor device according to claim 1 , further comprising a third insulating layer over the second insulating layer,
wherein the third insulating layer comprises an element X and oxygen, wherein the element X is at least one of aluminum, indium, gallium, and zinc.

10 . A semiconductor device comprising:
a gate electrode; a first insulating layer over the gate electrode; an oxide semiconductor layer over the first insulating layer; a second insulating layer over the oxide semiconductor layer, wherein the first insulating layer comprises a first region and a second region, wherein the first region is in contact with the oxide semiconductor layer and contains more oxygen than the second region, wherein the second region contains more nitrogen than the first region, wherein the oxide semiconductor layer has at least a concentration gradient of oxygen in a thickness direction, and wherein the concentration gradient becomes high on a first region side and on a second insulating layer side.

11 . A method for manufacturing a semiconductor device comprising the steps of:
forming a gate electrode; forming a first insulating layer over the gate electrode; adding oxygen in a vicinity of a surface of the first insulating layer; forming a metal oxide layer over the first insulating layer; forming a pair of electrodes over the metal oxide layer; and forming a second insulating layer over the pair of electrodes, wherein the step of forming the metal oxide layer is divided into a first step and a second step to deposit the metal oxide layer in vacuum through the first step and the second step conducted continuously, wherein the first step is conducted before the second step, and wherein the second step has a higher flow ratio of oxygen in a whole deposition gas than the first step.

12 . A method for manufacturing a semiconductor device comprising the steps of:
forming a gate electrode; forming a first insulating layer over the gate electrode; adding oxygen in a vicinity of a surface of the first insulating layer; forming a metal oxide layer over the first insulating layer; forming a pair of electrodes over the metal oxide layer; and forming a second insulating layer over the pair of electrodes, wherein the step of forming the metal oxide layer is divided into a first step, a second step, and a third step to deposit the metal oxide layer in vacuum through the first step, the second step, and the third step conducted continuously, wherein the first step is conducted before the second step, wherein the second step has a higher flow ratio of oxygen in a whole deposition gas than the first step, wherein the third step is conducted before the first step, and wherein the third step has a higher flow ratio of oxygen in a whole deposition gas than the first step.

Assignees

• Semiconductor Energy Lab

Inventors

• Koezuka Junichi
• Okazaki Kenichi
• Shima Yukinori
• Nakazawa Yasutaka
• Hosaka Yasuharu
• Yamazaki Shunpei

Classifications

• H10P14/3434

  being oxide semiconductor materials (Group IIB-VIA semiconductor materials H10P14/3424) · CPC title

• H10P14/3426

  Oxides · CPC title

• H10P14/22

  using physical deposition, e.g. vacuum deposition or sputtering · CPC title

• H10P10/00 Primary

  Bonding of wafers, substrates or parts of devices · CPC title

• G06F3/044

  by capacitive means · CPC title