Three-dimensional memory device having source-select-gate cut structures and methods for forming the same

Patent metadata

Field	Value
Publication number	US-12336181-B2
Application number	US-202318518798-A
Country	US
Kind code	B2
Filing date	Nov 24, 2023
Priority date	Dec 25, 2020
Publication date	Jun 17, 2025
Grant date	Jun 17, 2025

Abstract

A three-dimensional (3D) memory device includes a memory stack including a memory block. The memory block includes a memory array structures and a staircase structure in a first lateral direction, and fingers in a second lateral direction perpendicular to the first lateral direction. The fingers include a first finger and a second finger. The 3D memory device also includes a source-select-gate (SSG) cut structure extending through a portion of the memory stack and between the first finger and the second finger. The staircase structure includes a first staircase connected to first memory cells in the first finger and a second staircase connected to second memory cells in the second finger.

First claim

What is claimed is:

1. A three-dimensional (3D) memory device, comprising:
a memory stack comprising a memory block, the memory block comprising memory array structures and a staircase structure in a first lateral direction, and fingers in a second lateral direction perpendicular to the first lateral direction, the fingers comprising a first finger and a second finger; and
a source-select-gate (SSG) cut structure extending through a portion of the memory stack and between the first finger and the second finger,
wherein the staircase structure comprises a first staircase connected to first memory cells in the first finger and a second staircase connected to second memory cells in the second finger.

2. The 3D memory device of claim 1 , wherein the staircase structure comprising a staircase zone and a bridge structure adjacent to the staircase zone in the second lateral direction, the first staircase located in the staircase zone and connected to the first memory cells in the first finger through the bridge structure.

3. The 3D memory device of claim 2 , further comprising a passage structure between the bridge structure and the staircase zone.

4. The 3D memory device of claim 3 , wherein the first staircase is connected to the bridge structure through the passage structure.

5. The 3D memory device of claim 1 , wherein the first staircase comprises a first sub-staircase facing away from the second staircase in the first lateral direction and a second sub-staircase facing the second staircase in the first lateral direction.

6. The 3D memory device of claim 1 , wherein the memory array structures comprise a first memory array structure and a second array structure.

7. The 3D memory device of claim 6 , wherein the staircase structure is between the first memory array structure and the second array structure in the first lateral direction.

8. The 3D memory device of claim 7 , wherein the second staircase comprises a third sub-staircase connected to the second memory cells of the first memory array structure and a fourth sub-staircase connected to the second memory cells of the second array structure.

9. The 3D memory device of claim 1 , further comprising a slit structure extending in the first lateral direction and between the first finger and the second finger.

10. The 3D memory device of claim 9 , wherein the SSG cut structure aligned with the slit structure.

11. The 3D memory device of claim 1 , wherein the SSG cut structure comprises a dielectric material.

12. The 3D memory device of claim 3 , wherein the passage structure comprises conductive layers and dielectric layers interleaved along a third direction perpendicular to the first lateral direction and the second lateral direction.

13. A three-dimensional (3D) memory device, comprising:
a memory stack comprising a memory block, the memory block comprising memory array structures and a staircase structure in a first lateral direction, and strings in a second lateral direction perpendicular to the first lateral direction, the strings comprising a first string and a second string;
a top-select-gate (TSG) cut structure extending through a top portion of the memory stack and between the first string and the second string; and
a source-select-gate (SSG) cut structure extending through a bottom portion of the memory stack and between the first string and the second string, wherein the staircase structure comprises:
a first group of staircases comprising a first staircase connected to first memory cells in the first string, and a second staircase adjacent to the first staircase in the second lateral direction and connected to second memory cells in the second string; and
a second group of staircases adjacent to the first group of staircases in the first lateral direction and comprising a third staircase connected to memory cells in the memory block.

14. The 3D memory device of claim 13 , further comprising a third group of staircases comprising a fourth staircase connected to the first memory cells in the first string, a fifth staircase adjacent to the fourth staircase in the second lateral direction and connected to the second memory cells in the second string.

15. The 3D memory device of claim 14 , wherein the second group of staircases are between the first group of staircases and the third group of staircases in the first lateral direction.

16. The 3D memory device of claim 14 , wherein the SSG cut structure is between the first staircase and the second staircase, and the TSG cut structure is between the fourth staircase and the fifth staircase.

17. The 3D memory device of claim 13 , further comprising slit structures extending in the first lateral direction, the SSG cut structure is between adjacent slit structures of the slit structures.

18. The 3D memory device of claim 13 , wherein the staircase structure comprising a staircase zone and a bridge structure adjacent to the staircase zone in the second lateral direction, the first staircase located in the staircase zone and connected to the first memory cells in the first string through the bridge structure.

19. A three-dimensional (3D) memory device, comprising:
a memory stack comprising a memory block, the memory block comprising memory array structures and a staircase structure in a first lateral direction, and fingers in a second lateral direction perpendicular to the first lateral direction, the fingers comprising a first finger and a second finger;
a top-select-gate (TSG) cut structure extending through a top portion of the memory stack and between the first finger and the second finger; and
a source-select-gate (SSG) cut structure extending through a bottom portion of the memory stack and between the first finger and the second finger, wherein the staircase structure comprises:
a first group of staircases comprising a first staircase connected to first memory cells in the first finger, a second staircase adjacent to the first staircase in the second lateral direction and connected to second memory cells in the second finger; and
a second group of staircases adjacent to the first group of staircases in the first lateral direction and comprising a third staircase connected to memory cells in the memory block.

20. The 3D memory device of claim 19 , further comprising slit structures extending in the first lateral direction, the memory block is between adjacent slit structures of the slit structures.

Assignees

• Yangtze Memory Tech Co Ltd

Inventors

• Zhang Zhong

Classifications

• H10W20/435

  Cross-sectional shapes or dispositions of interconnections · CPC title

• H10W20/42

  Vias, e.g. via plugs · CPC title

• H10B43/27

  the channels comprising vertical portions, e.g. U-shaped channels · CPC title

• H10B41/35

  with a cell select transistor, e.g. NAND · CPC title

• H10B41/27

  the channels comprising vertical portions, e.g. U-shaped channels · CPC title