Biasing of cascode power amplifiers for multiple operating modes

Patent metadata

Field	Value
Publication number	US-12334885-B2
Application number	US-202217807342-A
Country	US
Kind code	B2
Filing date	Jun 16, 2022
Priority date	Jul 9, 2021
Publication date	Jun 17, 2025
Grant date	Jun 17, 2025

Abstract

Bias schemes for cascode power amplifiers are disclosed. In certain embodiments, a power amplifier system includes a cascode power amplifier biased by a first cascode bias voltage and that amplifies a radio frequency input signal. The power amplifier system further includes a bias voltage generation circuit including a first switch, a first cascode transmit mode bias circuit that provides the first cascode bias voltage to the cascode power amplifier through the first switch in a normal power transmit mode, a low power mode bias circuit that overrides the first cascode transmit mode bias circuit to set the first cascode bias voltage in a low power transmit mode, a second switch, and a sleep mode bias circuit that provides the first cascode bias voltage to the cascode power amplifier through the second switch in a sleep mode.

First claim

What is claimed is:

1. A power amplifier system comprising:
a cascode power amplifier biased by a first cascode bias voltage and configured to amplify a radio frequency input signal, the cascode power amplifier operable in a plurality of modes including a normal power transmit mode, a low power transmit mode, and a sleep mode; and
a bias voltage generation circuit including a first switch, a first cascode transmit mode bias circuit configured to provide the first cascode bias voltage to the cascode power amplifier through the first switch in the normal power transmit mode, a low power mode bias circuit configured to override the first cascode transmit mode bias circuit to set the first cascode bias voltage in the low power transmit mode, a second switch, and a sleep mode bias circuit configured to provide the first cascode bias voltage to the cascode power amplifier through the second switch in the sleep mode.

2. The power amplifier system of claim 1 wherein the first cascode transmit mode bias circuit sets a voltage level of the first cascode bias voltage to a voltage level indicated by a first cascode bias control signal.

3. The power amplifier system of claim 1 wherein the cascode power amplifier, the low power mode bias circuit, and the sleep mode bias circuit are powered by a first supply voltage.

4. The power amplifier system of claim 3 wherein the bias voltage generation circuit detects the low power transmit mode based on a voltage level of a second supply voltage and of a regulated voltage.

5. The power amplifier system of claim 1 wherein the plurality of modes further includes an idle mode in which a receiver is active and a transmitter including the cascode power amplifier is inactive, the sleep mode bias circuit configured to provide the first cascode bias voltage to the cascode power amplifier through the second switch in the idle mode.

6. The power amplifier system of claim 1 wherein the cascode power amplifier includes a gain transistor and a first cascode transistor, the first cascode bias voltage configured to bias the first cascode transistor.

7. The power amplifier system of claim 6 wherein the first cascode transistor is a field-effect transistor having a gate biased by the first cascode bias voltage.

8. The power amplifier system of claim 6 wherein the cascode power amplifier further includes a second cascode transistor biased by a second cascode bias voltage.

9. The power amplifier system of claim 8 wherein the bias voltage generation circuit further includes a third switch, a second cascode transmit mode bias circuit configured to provide the second cascode bias voltage to the cascode power amplifier through the third switch in the normal power transmit mode, and a fourth switch, the low power mode bias circuit configured to override the second cascode transmit mode bias circuit to set the second cascode bias voltage in the low power transmit mode, and the sleep mode bias circuit configured to provide the second cascode bias voltage to the cascode power amplifier through the fourth switch in the sleep mode.

10. A method of power amplifier biasing, the method comprising:
amplifying a radio frequency input signal using a cascode power amplifier that is biased by a first cascode bias voltage and that is operable in a plurality of modes including a normal power transmit mode, a low power transmit mode, and a sleep mode;
providing the first cascode bias voltage from a first cascode transmit mode bias circuit through a first switch in the normal power transmit mode;
overriding the first cascode transmit mode bias circuit to set the first cascode bias voltage in the low power transmit mode using a low power mode bias circuit; and
providing the first cascode bias voltage from a sleep mode bias circuit through a second switch in the sleep mode.

11. The method of claim 10 further comprising powering the cascode power amplifier, the low power mode bias circuit, and the sleep mode bias circuit using a first supply voltage.

12. The method of claim 11 wherein the bias voltage generation circuit detects the low power transmit mode based on a voltage level of a second supply voltage and of a regulated voltage.

13. The method of claim 10 wherein the plurality of modes further includes an idle mode in which a receiver is active and a transmitter including the cascode power amplifier is inactive, the sleep mode bias circuit configured to provide the first cascode bias voltage to the cascode power amplifier through the second switch in the idle mode.

14. A mobile device comprising:
a transceiver configured to generate a radio frequency input signal; and
a front end system including a cascode power amplifier biased by a first cascode bias voltage and configured to amplify a radio frequency input signal, the cascode power amplifier operable in a plurality of modes including a normal power transmit mode, a low power transmit mode, and a sleep mode, the front end system further including a bias voltage generation circuit including a first switch, a first cascode transmit mode bias circuit configured to provide the first cascode bias voltage to the cascode power amplifier through the first switch in the normal power transmit mode, a low power mode bias circuit configured to override the first cascode transmit mode bias circuit to set the first cascode bias voltage in the low power transmit mode, a second switch, and a sleep mode bias circuit configured to provide the first cascode bias voltage to the cascode power amplifier through the second switch in the sleep mode.

15. The mobile device of claim 14 wherein the first cascode transmit mode bias circuit sets a voltage level of the first cascode bias voltage to a voltage level indicated by a first cascode bias control signal.

16. The mobile device of claim 14 wherein the cascode power amplifier, the low power mode bias circuit, and the sleep mode bias circuit are powered by a first supply voltage.

17. The mobile device of claim 16 wherein the bias voltage generation circuit detects the low power transmit mode based on a voltage level of a second supply voltage and of a regulated voltage.

18. The mobile device of claim 17 wherein the plurality of modes further includes an idle mode in which a receiver of the transceiver is active and a transmitter of the transceiver is inactive, the sleep mode bias circuit configured to provide the first cascode bias voltage to the cascode power amplifier through the second switch in the idle mode.

19. The mobile device of claim 14 wherein the cascode power amplifier includes a gain transistor and a first cascode transistor, the first cascode bias voltage configured to bias the first cascode transistor.

20. The mobile device of claim 19 wherein the first cascode transistor is a field-effect transistor having a gate biased by the first cascode bias voltage.

Assignees

• Skyworks Solutions Inc

Inventors

• LIANG Bang Li
• Blin Guillaume Alexandre
• Obkircher Thomas

Classifications

• H03F1/02

  Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation · CPC title

• H04B1/40 Primary

  Circuits · CPC title

• H03F2200/451

  the amplifier being a radio frequency amplifier · CPC title

• H03F2200/61

  the cascode amplifier has more than one common gate stage · CPC title

• H03F1/0261

  with control of the polarisation voltage or current, e.g. gliding Class A · CPC title