Integration processes utilizing boron-doped silicon materials

Patent metadata

Field	Value
Publication number	US-12334358-B2
Application number	US-202117378720-A
Country	US
Kind code	B2
Filing date	Jul 18, 2021
Priority date	Jul 19, 2020
Publication date	Jun 17, 2025
Grant date	Jun 17, 2025

Abstract

Exemplary processing methods may include depositing a boron-containing material or a silicon-and-boron-containing material on a substrate disposed within a processing region of a semiconductor processing chamber. The methods may include etching portions of the boron-containing material or the silicon-and-boron-containing material with a chlorine-containing precursor to form one or more features in the substrate. The methods may also include removing remaining portions of the boron-containing material or the silicon-and-boron-containing material from the substrate with a fluorine-containing precursor.

First claim

The invention claimed is:

1. A processing method comprising:
depositing a silicon-and-boron-containing material on a substrate disposed within a processing region of a semiconductor processing chamber;
etching portions of the silicon-and-boron-containing material with a chlorine-containing precursor to form one or more features in the substrate; and
removing remaining portions of the silicon-and-boron-containing material from the substrate with a fluorine-containing precursor at a rate of greater than 70 nm/min.

2. The processing method of claim 1 , wherein depositing the silicon-and-boron-containing material comprises:
delivering a silicon-containing precursor and a boron-containing precursor to a processing region of a semiconductor processing chamber;
providing a hydrogen-containing precursor with the silicon-containing precursor and the boron-containing precursor, wherein a flow rate ratio of the hydrogen-containing precursor to either of the silicon-containing precursor or the boron-containing precursor is greater than or about 2:1; and
forming a plasma of all precursors within the processing region of a semiconductor processing chamber.

3. The processing method of claim 1 , wherein the silicon-and-boron-containing material is characterized by a film thickness greater than or about 20 nm.

4. The processing method of claim 1 , wherein a substrate temperature is maintained above or about 400° C. during the depositing the silicon-and-boron-containing material on the substrate, and wherein the substrate temperature is maintained above or about 200° C. during the removing.

5. The processing method of claim 1 , wherein the etching comprises:
forming a plasma of a bromine-containing precursor;
contacting the silicon-and-boron-containing material with plasma effluents of the bromine-containing precursor;
halting delivery of the bromine-containing precursor;
forming a plasma of a chlorine-containing precursor; and
contacting the silicon-and-boron-containing material with plasma effluents of the chlorine-containing precursor.

6. The processing method of claim 1 , wherein the etching comprises:
forming a plasma of an etchant mixture comprising the chlorine-containing precursor and an oxygen-containing precursor;
contacting the silicon-and-boron-containing material with plasma effluents of the etchant mixture while forming the plasma at a first plasma power; and
subsequent a first period of time, increasing the first plasma power to a second plasma power.

7. The processing method of claim 6 , wherein the etching comprises:
transferring a pattern from an overlying mask material through the silicon-and-boron-containing material.

8. The processing method of claim 6 , wherein the etching comprises:
applying a bias power during the first period of time; and
halting the bias power subsequent the first period of time.

9. The processing method of claim 1 , wherein the removing comprises:
forming a remote plasma of an etchant mixture comprising the fluorine-containing precursor and a hydrogen-containing precursor;
contacting the silicon-and-boron-containing material with plasma effluents of the etchant mixture; and
removing the silicon-and-boron-containing material at a selectivity of greater than or about 20:1 relative to another exposed material on the substrate.

10. The processing method of claim 9 , wherein the remote plasma is formed at a plasma power of greater than or about 2.0 kW.

11. An etching method comprising:
forming a plasma of an etchant mixture comprising a chlorine-containing precursor and an oxygen-containing precursor,
contacting a silicon-and-boron-containing material on a substrate disposed within a processing region of a semiconductor processing chamber with plasma effluents of the etchant mixture while forming the plasma at a first plasma power, and
subsequent a first period of time, increasing the first plasma power to a second plasma power to form one or more features in the substrate.

12. The etching method of claim 11 , wherein the silicon-and-boron-containing material is characterized by a boron concentration of greater than or about 40 at. %.

13. The etching method of claim 11 , wherein the etchant mixture further comprises:
a fluorine-containing precursor, wherein a flow-rate ratio of the fluorine-containing precursor to the oxygen-containing precursor to the chlorine-containing precursor is greater than or about 1:5:10.

14. The etching method of claim 11 , further comprising:
applying a bias power during the first period of time; and
halting the bias power subsequent the first period of time.

15. The etching method of claim 14 , wherein the plasma is formed at a pulsing frequency of greater than or about 500 Hz.

16. The etching method of claim 15 , wherein a duty cycle of the bias power during the plasma formation is less than or about 40%.

17. A removal method comprising:
forming a remote plasma of an etchant mixture comprising a fluorine-containing precursor and a hydrogen-containing precursor;
contacting a silicon-and-boron-containing material characterized by a boron concentration of greater than or about 10 at. % on a substrate disposed within a processing region of a semiconductor processing chamber with plasma effluents of the etchant mixture, wherein the silicon-and-boron-containing material defines one or more features in the substrate; and
removing the silicon-and-boron-containing material at a rate of greater than or about 35 nm/min.

18. The removal method of claim 17 , wherein a temperature of the substrate during the removing is maintained above or about 200° C., and wherein the remote plasma is formed at a plasma power of greater than or about 2.0 kW.

19. The removal method of claim 17 , wherein the substrate further comprises an exposed region of titanium nitride, and wherein the etchant mixture further includes ammonia.

20. The etching method of claim 11 , further comprising:
passivating exposed surfaces of the one or more features in the substrate.

Assignees

• Applied Materials Inc

Inventors

• Koshizawa Takehito
• Janakiraman Karthik
• Cheng Rui
• Nittala Krishna
• Li Menghui
• Chuang Ming-Yuan
• Shinohara Susumu
• Guo Juan
• Yang Xiawan
• Teo Russell Chin Yee
• Li Zihui
• Kao Chia-Ling
• Jin Qu
• Wang Anchuan

Classifications

• H10P14/416

  of highly doped semiconductor materials, e.g. polysilicon layers or amorphous silicon layers · CPC title

• H10P76/4085 Primary

  characterised by the processes involved to create the masks · CPC title

• H10P76/405

  characterised by their composition, e.g. multilayer masks · CPC title

• H10P50/268

  of silicon-containing layers · CPC title

• H10P50/73

  using masks for insulating materials · CPC title