Block family-based error avoidance for memory devices

US12307111B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-12307111-B2
Application numberUS-202318526634-A
CountryUS
Kind codeB2
Filing dateDec 1, 2023
Priority dateDec 19, 2019
Publication dateMay 20, 2025
Grant dateMay 20, 2025

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

An example memory sub-system includes a memory device and a processing device, operatively coupled to the memory device. The processing device is configured to initialize a block family associated with a memory device; initialize a timeout associated with the block family; initializing a low temperature and a high temperature using a reference temperature at the memory device; responsive to programming a block residing on the memory device, associate the block with the block family; and responsive to at least one of: detecting expiration of the timeout or determining that a difference between the high temperature and the low temperature is greater than or equal to a specified threshold temperature value, close the block family.

First claim

Opening claim text (preview).

What is claimed is: 1. A system comprising: a memory device; and a processing device, operatively coupled to the memory device, the processing device to: associate, with a first threshold voltage offset bin, a current block family associated with the memory device; responsive to programming a first block residing on the memory device, associate the first block with the current block family; associate the current block family with a second threshold voltage offset bin; and read, using a threshold voltage offset associated with the second threshold voltage offset bin, data from a second block of the current block family. 2. The system of claim 1 , wherein associating the block with the current block family further comprises: appending, to block family metadata, a record associating the first block with the current block family. 3. The system of claim 2 , wherein the block family metadata comprises a first table including a plurality of records, wherein a record of the plurality of records associates the first block with the current block family. 4. The system of claim 2 , wherein the block family metadata comprises a second table including a plurality of records, wherein each record of the plurality of records associates a plurality of dies of the current block family with respective threshold voltage offset bins. 5. The system of claim 2 , wherein the block family metadata comprises a third table including a plurality of records, wherein each record of the plurality of records associates a corresponding threshold voltage offset bin with one or more threshold voltages to be applied to respective base voltage read levels for performing read operations. 6. The system of claim 1 , wherein the processing device is further to: initialize a low temperature and a high temperature using a reference temperature at the memory device; responsive to determining that a difference between the high temperature and the low temperature is greater than or equal to a specified threshold temperature value, close the current block family. 7. The system of claim 6 , wherein the processing device is further to: receive a second reference temperature of the current block family; responsive to determining that the second reference temperature is greater than or equal to the high temperature, update the high temperature to store the second reference temperature; and responsive to determining that the second reference temperature falls below the low temperature, update the low temperature to store the second reference temperature. 8. The system of claim 6 , wherein the processing device is further to: responsive to closing the current block family, initialize a new block family. 9. The system of claim 1 , wherein the current block family comprises a plurality of blocks that have been programmed within at least one of: a specified time window or a specified temperature window. 10. A method, comprising: associating, by a processing device, with a first threshold voltage offset bin, a current block family associated with a memory device; responsive to programming a first block residing on the memory device, associating the first block with the current block family; associating the current block family with a second threshold voltage offset bin; and reading, using a threshold voltage offset associated with the second threshold voltage offset bin, data from a second block of the current block family. 11. The method of claim 10 , wherein associating the block with the current block family further comprises: appending, to block family metadata, a record associating the first block with the current block family. 12. The method of claim 10 , further comprising: initializing a low temperature and a high temperature using a reference temperature at the memory device; responsive to determining that a difference between the high temperature and the low temperature is greater than or equal to a specified threshold temperature value, closing the current block family. 13. The method of claim 12 , further comprising: responsive to closing the current block family, initializing a new block family. 14. The method of claim 10 , wherein the current block family comprises a plurality of blocks that have been programmed within at least one of: a specified time window or a specified temperature window. 15. A computer-readable non-transitory storage medium comprising executable instructions that, when executed by a processing device, cause the processing device to: associate, with a first threshold voltage offset bin, a current block family associated with a memory device; responsive to programming a first block residing on the memory device, associate the first block with the current block family; associate the current block family with a second threshold voltage offset bin; and read, using a threshold voltage offset associated with the second threshold voltage offset bin, data from a second block of the current block family. 16. The computer-readable non-transitory storage medium of claim 15 , wherein associating the block with the current block family further comprises: appending, to block family metadata, a record associating the first block with the current block family. 17. The computer-readable non-transitory storage medium of claim 15 , further comprising executable instructions that, when executed by the processing device, cause the processing device to: initialize a low temperature and a high temperature using a reference temperature at the memory device; responsive to determining that a difference between the high temperature and the low temperature is greater than or equal to a specified threshold temperature value, close the current block family. 18. The computer-readable non-transitory storage medium of claim 17 , further comprising executable instructions that, when executed by the processing device, cause the processing device to: receive a second reference temperature of the current block family; responsive to determining that the second reference temperature is greater than or equal to the high temperature, update the high temperature to store the second reference temperature; and responsive to determining that the second reference temperature falls below the low temperature, update the low temperature to store the second reference temperature. 19. The computer-readable non-transitory storage medium of claim 17 , further comprising executable instructions that, when executed by the processing device, cause the processing device to: responsive to closing the current block family, initialize a new block family. 20. The computer-readable non-transitory storage medium of claim 15 , wherein the current block family comprises a plurality of blocks that have been programmed within at least one of: a specified time window or a specified temperature window.

Assignees

Inventors

Classifications

  • Single storage device · CPC title

  • Resource optimization · CPC title

  • G11C16/26Primary

    Sensing or reading circuits; Data output circuits · CPC title

  • Address translation · CPC title

  • comprising cells having several storage transistors connected in series · CPC title

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What does patent US12307111B2 cover?
An example memory sub-system includes a memory device and a processing device, operatively coupled to the memory device. The processing device is configured to initialize a block family associated with a memory device; initialize a timeout associated with the block family; initializing a low temperature and a high temperature using a reference temperature at the memory device; responsive to pro…
Who is the assignee on this patent?
Micron Technology Inc
What technology area does this patent fall under?
Primary CPC classification G11C16/26. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue May 20 2025 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 12 related publications on this page (citations in our corpus or others sharing the same primary CPC).