Die interconnect substrate, an electrical device and a method for forming a die interconnect substrate

US12300613B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-12300613-B2
Application numberUS-202318525435-A
CountryUS
Kind codeB2
Filing dateNov 30, 2023
Priority dateMar 31, 2017
Publication dateMay 13, 2025
Grant dateMay 13, 2025

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  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A die interconnect substrate comprises a bridge die comprising at least one bridge interconnect connecting a first bridge die pad of the bridge die to a second bridge die pad of the bridge die. The die interconnect substrate comprises a multilayer substrate structure comprising a substrate interconnect. The bridge die is embedded in the multilayer substrate structure. The substrate interconnect extends from a level above the bridge die to a level below the bridge die. The multilayer substrate structure further comprises an electrically insulating layer comprising a first electrically insulating material. The multilayer substrate structure further comprises an electrically insulating filler structure located laterally between the bridge die and the electrically insulating layer, wherein the electrically insulating filler structure comprises a second electrically insulating material different from the first electrically insulating material.

First claim

Opening claim text (preview).

What is claimed is: 1. A die interconnect substrate, comprising: a bridge die having a top side above a bottom side, and a first sidewall and a second sidewall between the top side and the bottom side, the first sidewall laterally opposite the second sidewall, the bridge die having a bridge die pad; a substrate interconnect laterally spaced apart from the first sidewall of the bridge die, the substrate interconnect having an uppermost surface below the top side of the bridge die; an insulating filler structure laterally between the substrate interconnect and the first sidewall of the bridge die; an insulating layer on and in direct contact with the substrate interconnect, on the insulating filler structure, and on the bridge die; a vertical wiring layer in a first opening in the insulating layer, the vertical wiring layer on the substrate interconnect; a first lateral wiring layer on the vertical wiring layer and on the insulating layer; a first contact interface structure on the first lateral wiring layer; a via portion in a second opening in the insulating layer, the via portion on the bridge die pad; a second lateral wiring layer on the via portion and on the insulating layer; and a second contact interface structure on the second lateral wiring layer. 2. The die interconnect substrate of claim 1 , wherein the substrate interconnect comprises two or more layers. 3. The die interconnect substrate of claim 1 , wherein the insulating layer is on the bridge die pad. 4. The die interconnect substrate of claim 1 , wherein the insulating filler structure is not in contact with the substrate interconnect. 5. The die interconnect substrate of claim 1 , wherein the substrate interconnect has an uppermost surface below an uppermost surface of the bridge die. 6. The die interconnect substrate of claim 1 , wherein the first contact interface structure has an uppermost surface at a same level as an uppermost surface of the second contact interface structure, and wherein the first contact interface structure and the second contact interface structure are in a same insulating layer. 7. The die interconnect substrate of claim 1 , wherein the first lateral wiring layer and the second lateral wiring layer are in a same insulating layer. 8. The die interconnect substrate of claim 1 , wherein the first contact interface structure, the second contact interface structure are in a same insulating layer, the first lateral wiring layer and the second lateral wiring layer are in a same insulating layer. 9. A die interconnect substrate, comprising: a bridge die having a top side above a bottom side, and a first sidewall and a second sidewall between the top side and the bottom side, the first sidewall laterally opposite the second sidewall, the bridge die having a bridge die pad; a first conductive structure laterally spaced apart from the first sidewall of the bridge die, the first conductive structure having an uppermost surface below the top side of the bridge die; an insulating filler structure laterally between the substrate interconnect and the first sidewall of the bridge die; an insulating layer on and in direct contact with the substrate interconnect, on the insulating filler structure, and on the bridge die pad; a first metallization layer comprising a second conductive structure in a first opening in the insulating layer, the second conductive structure on the first conductive structure, and the first metallization layer comprising a via portion in a second opening in the insulating layer, the via portion on the bridge die pad; a second metallization layer above the first metallization layer, the second metallization layer comprising a first conductive wiring on the second conductive structure and on the insulating layer, and the second metallization layer comprising a second conductive wiring on the via portion and on the insulating layer; and a third metallization layer above the second metallization layer, the third metallization layer comprising a first contact interface structure on the first conductive wiring, and the third metallization layer comprising a second contact interface structure on the second conductive wiring. 10. The die interconnect substrate of claim 9 , wherein the first conductive structure comprises two or more layers. 11. The die interconnect substrate of claim 9 , wherein the insulating filler structure is not in contact with the first conductive structure, and wherein the first conductive structure has an uppermost surface below an uppermost surface of the bridge die. 12. The die interconnect substrate of claim 9 , wherein the first contact interface structure has an uppermost surface at a same level as an uppermost surface of the second contact interface structure, and wherein the first contact interface structure and the second contact interface structure are in a same insulating layer. 13. A method of fabricating a die interconnect substrate, the method comprising: providing a bridge die having a top side above a bottom side, and a first sidewall and a second sidewall between the top side and the bottom side, the first sidewall laterally opposite the second sidewall, the bridge die having a bridge die pad; forming a substrate interconnect laterally spaced apart from the first sidewall of the bridge die, the substrate interconnect having an uppermost surface below the top side of the bridge die; forming an insulating filler structure laterally between the substrate interconnect and the first sidewall of the bridge die; forming an insulating layer on and in direct contact with the substrate interconnect, on the insulating filler structure, and on the bridge die; forming a vertical wiring layer in a first opening in the insulating layer, the vertical wiring layer on the substrate interconnect; forming a first lateral wiring layer on the vertical wiring layer and on the insulating layer; forming a first contact interface structure on the first lateral wiring layer; forming a via portion in a second opening in the insulating layer, the via portion on the bridge die pad; forming a second lateral wiring layer on the via portion and on the insulating layer; and forming a second contact interface structure on the second lateral wiring layer. 14. The method of claim 13 , wherein the substrate interconnect comprises two or more layers. 15. The method of claim 13 , wherein the insulating filler structure is not in contact with the substrate interconnect. 16. The method of claim 13 , wherein the substrate interconnect has an uppermost surface below an uppermost surface of the bridge die. 17. The method of claim 13 , wherein the first contact interface structure has an uppermost surface at a same level as an uppermost surface of the second contact interface structure. 18. The method of claim 13 , wherein the first contact interface structure and the second contact interface structure are in a same insulating layer. 19. The method of claim 13 , wherein the first lateral wiring layer and the second lateral wiring layer are in a same insulating layer. 20. The method of claim 13 , wherein the first contact interface structure, the second contact interface structure are in a same insulating layer, the first lateral wiring layer and the second lateral wiring layer are in a same insulating layer.

Assignees

Inventors

Classifications

  • Subject matter not provided for in other groups of this subclass · CPC title

  • characterised by multiple insulating or insulated package substrates, interposers or RDLs · CPC title

  • Package configurations · CPC title

  • Interconnections or connectors in packages · CPC title

  • H10W70/611Primary

    for connecting multiple chips together · CPC title

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Frequently asked questions

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What does patent US12300613B2 cover?
A die interconnect substrate comprises a bridge die comprising at least one bridge interconnect connecting a first bridge die pad of the bridge die to a second bridge die pad of the bridge die. The die interconnect substrate comprises a multilayer substrate structure comprising a substrate interconnect. The bridge die is embedded in the multilayer substrate structure. The substrate interconnect…
Who is the assignee on this patent?
Intel Corp
What technology area does this patent fall under?
Primary CPC classification H10W70/611. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue May 13 2025 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 4 related publications on this page (citations in our corpus or others sharing the same primary CPC).