Sensing amplifier, method and controller for sensing memory cell

Patent metadata

Field	Value
Publication number	US-12288577-B2
Application number	US-202318177749-A
Country	US
Kind code	B2
Filing date	Mar 2, 2023
Priority date	Feb 27, 2020
Publication date	Apr 29, 2025
Grant date	Apr 29, 2025

Abstract

A sensing amplifier, coupled to at least one memory cell, includes an output terminal and a reference terminal, a multiplexer circuit, and a plurality of reference cells having equal value. An output terminal of the multiplexer circuit is coupled to the reference terminal of the sensing amplifier. Each of the reference cell is coupled to each input node of the multiplexer circuit. The multiplexer circuit is controlled by a control signal to select one of the reference cells as a selected reference cell to couple to the reference terminal of the sensing amplifier when each read operation to the at least one memory cell is performed. The plurality of reference cells are selected sequentially and repeatedly, and the one of the reference cells is selected for one read operation to the at least one memory cell.

First claim

What is claimed is:

1. A sensing amplifier, comprising:
a sensing amplifier circuit;
a multiplexer circuit, an output terminal thereof is coupled to the sensing amplifier circuit; and
a plurality of reference cells having equal value, each of the reference cell is coupled to each input node of the multiplexer circuit,
wherein the plurality of reference cells are selected sequentially and repeatedly by the multiplexer circuit, and the one of the reference cells is selected as a selected reference cell for coupling to the sensing amplifier circuit in response to each read operation to at least one memory cell is performed,
wherein the sensing amplifier circuit performs a read operation to the at least one first memory cell according to the selected reference cell comprising:
the sensing amplifier circuit compares a data voltage of the at least one first memory cell and a reference voltage of the selected reference cell; and
the sensing amplifier circuit obtains a data of the at least one first memory cell on an output terminal of the sensing amplifier circuit by a comparison result of the data voltage of the at least one first memory cell and the reference voltage of the selected reference cell.

2. The sensing amplifier of claim 1 , wherein the sensing amplifier further comprises:
an output terminal and a reference terminal,
wherein an output terminal of the multiplexer circuit is coupled to the reference terminal of the sensing amplifier,
wherein the multiplexer circuit is controlled by a control signal to select one of the reference cells as the selected reference cell to couple to the reference terminal of the sensing amplifier in response to each read operation to the at least one memory cell is performed.

3. The sensing amplifier of claim 1 , wherein the plurality of the reference cells is arranged in a column or the plurality of the reference cells is arranged in a row.

4. The sensing amplifier of claim 1 , wherein the plurality of the reference cells is arranged in a matrix with multiple columns and rows.

5. The sensing amplifier of claim 1 , wherein the at least one memory cell is a column of a memory array.

6. The sensing amplifier of claim 1 , wherein the controller controls the sensing amplifier circuit to generate the data of the at least one memory cell on the output terminal of the sensing amplifier by comparing the data voltage of the at least one memory cell and the reference voltage of the selected reference cell.

7. The sensing amplifier of claim 1 , further comprising:
a second sensing amplifier circuit; and
a plurality of second reference cells having equal value, each of the second reference cell is coupled to each input node of the multiplexer circuit,
wherein the multiplexer circuit selects one of the second reference cells as the selected reference cell to couple to a reference terminal of the plurality of second sensing amplifier circuit sequentially and repeatedly in response to next read operation to at least one second memory cell is performed.

8. A method for sensing memory cell, comprising:
selecting one of first reference cells as a selected reference cell to couple to a first sensing amplifier in response to each read operation to at least one first memory cell is performed, wherein each of the first reference cells has equal value; and
performing a read operation to the at least one first memory cell according to the selected reference cell,
wherein the first reference cells are selected sequentially and repeatedly, and the one of the first reference cells is selected for coupling to the first sensing amplifier in response to each read operation to at least one memory cell is performed,
wherein performing the read operation to the at least one first memory cell according to the selected reference cell comprising:
comparing a data voltage of the at least one first memory cell and a reference voltage of the selected reference cell; and
obtaining a data of the at least one first memory cell on an output terminal of the first sensing amplifier by a comparison result of the data voltage of the at least one first memory cell and the reference voltage of the selected reference cell.

9. The method of claim 8 , further comprising:
selecting one of second reference cells as a selected reference cell to couple to a second sensing amplifier in response to each read operation to at least one second memory cell is performed; and
performing a read operation to the at least one second memory cell according to the selected reference cell,
wherein performing the read operation to the at least one second memory cell according to the selected reference cell comprising:
comparing a data voltage of the at least one second memory cell and a reference voltage of the selected reference cell; and
obtaining a data of the at least one second memory cell on an output terminal of the second sensing amplifier by a comparison result of the data voltage of the at least one second memory cell and the reference voltage of the selected reference cell.

10. The method of claim 9 , wherein a reference terminal of the second sensing amplifier is coupled to a reference terminal of the first sensing amplifier.

11. The method of claim 8 , wherein the plurality of the first reference cells are arranged in a column, a row, or a matrix with multiple columns and rows.

12. The method of claim 9 , further comprising:
selecting another one of second reference cells as the selected reference cell to couple to a reference terminal of the second sensing amplifier sequentially and repeatedly in response to next read operation to at least one second memory cell is performed.

13. A controller of a multiplexer circuit for sensing memory cell,
wherein the controller is configured to:
select one of a plurality of first reference cells as a selected reference cell to couple to a first sensing amplifier in response to each read operation to at least one first memory cell is performed, wherein each of the first reference cells has equal value; and
perform a read operation to the at least one first memory cell according to the selected reference cell,
wherein the first reference cells are selected sequentially and repeatedly, and the one of the first reference cells is selected as a selected reference cell for coupling to the first sensing amplifier in response to each read operation to at least one memory cell is performed,
wherein performing a read operation to the at least one first memory cell according to the selected reference cell comprising:
comparing a data voltage of the at least one first memory cell and a reference voltage of the selected reference cell; and
obtaining a data of the at least one first memory cell on an output terminal of the first sensing amplifier by a comparison result of the data voltage of the at least one first memory cell and the reference voltage of the selected reference cell.

14. The controller of claim 13 , further configured to:
select one of second reference cells as a selected reference cell to couple to a second sensing amplifier in response to each read operation to at least one second memory cell is performed; and
perform a read operation to the at least one second memory cell according to the selected reference cell,
wherein the controller is configured to performing the read operation to the at least one second memory cell according to the selected reference cell further comprising:
the controller compares a data voltage of the at least one second memory cell and a reference voltage of the selected reference cell; and
the controller obtains a data of the at least one second m

Assignees

• Taiwan Semiconductor Mfg Co Ltd

Inventors

• Noguchi Hiroki
• Lin Ku-Feng
• Wang Yih

Classifications

• G11C7/06 Primary

  Sense amplifiers; Associated circuits {, e.g. timing or triggering circuits} · CPC title

• G11C7/062 Primary

  Differential amplifiers of non-latching type, e.g. comparators, long-tailed pairs · CPC title

• G11C7/1051

  Data output circuits, e.g. read-out amplifiers, data output buffers, data output registers, data output level conversion circuits · CPC title

• G11C7/14 Primary

  Dummy cell management; Sense reference voltage generators · CPC title