Integrated circuit packages with solder thermal interface materials with embedded particles

Patent metadata

Field	Value
Publication number	US-12272614-B2
Application number	US-201916423700-A
Country	US
Kind code	B2
Filing date	May 28, 2019
Priority date	May 28, 2019
Publication date	Apr 8, 2025
Grant date	Apr 8, 2025

Abstract

Disclosed herein are integrated circuit (IC) packages with solder thermal interface materials (STIMs) with embedded particles, as well as related methods and devices. For example, in some embodiments, an IC package may include a package substrate, a lid, a die between the package substrate and the lid and a STIM between the die and the lid. The STIM may include embedded particles, and at least some of the embedded particles may have a diameter equal to a distance between the die and the lid.

First claim

The invention claimed is:

1. An integrated circuit (IC) package, comprising:
a package substrate;
a die;
a lid, wherein the die is between the package substrate and the lid, the lid having a hole that is not directly over the die, wherein the hole extends through the lid from an upper surface of the lid to a lower surface of the lid, and the hole is configured to allow gas to escape from a region of the IC package that includes the die;
a solder thermal interface material (STIM) coupled between the die and the lid, wherein the STIM includes an electrically conductive matrix of a first electrically conductive material and electrically conductive particles of a second electrically conductive material embedded in the electrically conductive matrix, at least a portion of the electrically conductive particles of the second electrically conductive material are in direct contact with the die and in direct contact with the lid, a melting point of the first electrically conductive material is lower than a melting point of the second electrically conductive material, a sum of a volume occupied by the electrically conductive particles and a volume occupied by the electrically conductive matrix is an entirety of a volume of a space between the die and the lid, wherein, in a cross-section through the STIM, the die, and the package substrate, a lower concentration of the electrically conductive particles that are in direct contact with the die and in direct contact with the lid are in a central portion of the STIM than at a left side portion of the cross-section of the STIM and at a right side portion of the cross-section of the STIM, each of the left side portion and right side portion in contact with the die and in contact with the lid; and
an intermetallic compound between the lid and the die, the intermetallic compound comprising gold and indium.

2. The IC package of claim 1 , wherein the volume occupied by the electrically conductive particles is less than 50 percent of a volume of the STIM.

3. The IC package of claim 1 , wherein the first electrically conductive material and the second electrically conductive material have different material compositions.

4. The IC package of claim 1 , wherein the intermetallic compound is proximate to an interface of the lid and the STIM.

5. The IC package of claim 1 , wherein the first electrically conductive material is a solder material.

6. The IC package of claim 1 , wherein the space between the die and the lid does not include polymers.

7. The IC package of claim 1 , wherein all of the volume of the space between the die and the lid is occupied by the electrically conductive particles, the intermetallic compound, and the electrically conductive matrix.

8. The IC package of claim 1 , further comprising sealant between a leg portion of the lid and the package substrate, wherein there are gaps in the sealant.

9. The IC package of claim 1 , wherein at least some of the electrically conductive particles have a cylindrical shape.

10. The IC package of claim 1 , wherein at least some of the electrically conductive particles have a fractal shape.

11. An integrated circuit (IC) package, comprising:
a die, the die having a perimeter and a central portion, the perimeter of the die surrounding the central portion of the die;
a lid having a hole that is not directly over the die, wherein the hole extends through the lid from an upper surface of the lid to a lower surface of the lid, and the hole is configured to allow gas to escape from a region of the IC package that includes the die;
a solder thermal interface material (STIM) coupled between the die and the lid, wherein the STIM includes a surrounding material and particles embedded in the surrounding material, the surrounding material is a non-polymer based electrically conductive material having a first melting point, the particles are electrically conductive particles having a second melting point, the first melting point is lower than the second melting point, at least a portion of the electrically conductive particles are in contact with the die and in contact with the lid, no polymer is present in a space between the die and the lid, wherein, in a cross-section through the STIM, the lid, and the die, a lower concentration of the electrically conductive particles that are in contact with the die and in contact with the lid are in a central portion of the STIM than at a left side portion of the cross-section of the STIM and at a right side portion of the cross-section of the STIM, each of the left side portion and right side portion in contact with the die and in contact with the lid; and
an intermetallic compound between the lid and the die, the intermetallic compound comprising gold and indium.

12. The IC package of claim 11 , wherein the surrounding material has a melting point that is lower than a melting point of the particles.

13. The IC package of claim 11 , wherein the lid includes copper or aluminum.

14. The IC package of claim 11 , wherein the lid includes a metal region in contact with the STIM, and the metal region includes gold or silver.

15. The IC package of claim 11 , wherein the IC package is a ball grid array (BGA) package.

16. The IC package of claim 11 , wherein all of a volume of a space between the die and the lid is occupied by the particles, the intermetallic compound, and the surrounding material.

17. The IC package of claim 11 , further comprising sealant between a leg portion of the lid and a package substrate, wherein there are gaps in the sealant.

18. The IC package of claim 11 , wherein at least some of the electrically conductive particles have a cylindrical shape.

19. The IC package of claim 11 , wherein at least some of the electrically conductive particles have a fractal shape.

20. The IC package of claim 11 , wherein the intermetallic compound is proximate to an interface of the lid and the STIM.

Assignees

• Intel Corp

Inventors

• Saha Amitesh
• Chan Arguedas Sergio Antonio
• Cartas Marco Aurelio
• Hackenberg Ken
• Li Peng

Classifications

• H10W40/22

  characterised by their shape, e.g. having conical or cylindrical projections · CPC title

• H10W72/877

  Bump connectors and die-attach connectors · CPC title

• H10W74/15

  on active surfaces of flip-chip devices, e.g. underfills · CPC title

• H10W90/724

  between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

• H10W72/247

  Dispositions of multiple bumps · CPC title