Semiconductor device and method of forming a slot in EMI shielding with improved removal depth

Patent metadata

Field	Value
Publication number	US-12255152-B2
Application number	US-202318359688-A
Country	US
Kind code	B2
Filing date	Jul 26, 2023
Priority date	May 5, 2021
Publication date	Mar 18, 2025
Grant date	Mar 18, 2025

Abstract

A semiconductor device is formed by providing a semiconductor package including a shielding layer and forming a slot in the shielding layer using a laser. The laser is turned on and exposed to the shielding layer with a center of the laser disposed over a first point of the shielding layer. The laser is moved in a loop while the laser remains on and exposed to the shielding layer. Exposure of the laser to the shielding layer is stopped when the center of the laser is disposed over a second point of the shielding layer. A distance between the first point and the second point is approximately equal to a radius of the laser.

First claim

What is claimed:

1. A semiconductor device, comprising:
a substrate;
a first semiconductor die disposed over the substrate;
a second semiconductor die disposed over the substrate;
a conductive post disposed over the substrate between the first semiconductor die and second semiconductor die;
an encapsulant deposited over the substrate;
a shielding layer formed over the encapsulant and on the conductive post; and
a first slot formed in the shielding layer over the first semiconductor die, wherein the first slot includes,
a first linear portion,
a second linear portion oriented perpendicular to the first linear portion, and
a curved portion connecting the first linear portion and the second linear portion.

2. The semiconductor device of claim 1 , wherein the first slot forms an incomplete loop with a gap between a first end of the loop and a second end of the loop.

3. The semiconductor device of claim 1 , further including a second slot extending from the first slot perpendicularly.

4. The semiconductor device of claim 3 , further including a third slot extending parallel to the first slot with the second slot extending from the first slot to the third slot.

5. The semiconductor device of claim 1 , wherein the curved portion forms a radiused corner for the first slot.

6. The semiconductor device of claim 1 , wherein the first slot is formed as a completed loop.

7. A semiconductor device, comprising:
a substrate;
a first semiconductor die disposed over the substrate;
an encapsulant deposited over the substrate;
a shielding layer formed over the encapsulant; and
a first slot formed in the shielding layer over the first semiconductor die, wherein the first slot forms an incomplete loop with a gap between a first end of the loop and a second end of the loop.

8. The semiconductor device of claim 7 , further including a second slot extending from the first slot perpendicularly.

9. The semiconductor device of claim 8 , further including a third slot extending parallel to the first slot with the second slot extending from the first slot to the third slot.

10. The semiconductor device of claim 7 , wherein the first slot includes a rounded corner.

11. The semiconductor device of claim 7 , further including:
a second semiconductor die disposed over the substrate; and
a conductive post disposed over the substrate between the first semiconductor die and second semiconductor die.

12. The semiconductor device of claim 11 , wherein the conductive post extends from the substrate to the shielding layer.

13. A semiconductor device, comprising:
a substrate;
an encapsulant deposited over the substrate;
a shielding layer formed over the encapsulant; and
a first slot formed in the shielding layer, wherein the first slot includes,
a first linear portion,
a second linear portion oriented perpendicular to the first linear portion, and

a curved portion connecting the first linear portion and the second linear portion.

14. The semiconductor device of claim 13 , wherein the first slot forms an incomplete loop with a gap between a first end of the loop and a second end of the loop.

15. The semiconductor device of claim 13 , further including a second slot extending from the first slot perpendicularly.

16. The semiconductor device of claim 15 , further including a third slot extending parallel to the first slot with the second slot extending from the first slot to the third slot.

17. The semiconductor device of claim 13 , wherein the curved portion forms a radiused corner for the first slot.

18. The semiconductor device of claim 13 , further including a conductive post extending from the substrate to the shielding layer.

19. A semiconductor device, comprising:
an encapsulant;
a shielding layer formed over the encapsulant; and
a first slot formed in the shielding layer, wherein the first slot forms an incomplete loop with a gap between a first end of the loop and a second end of the loop.

20. The semiconductor device of claim 19 , further including a second slot extending from the first slot perpendicularly.

21. The semiconductor device of claim 19 , wherein the first slot includes a rounded corner.

22. The semiconductor device of claim 19 , further including:
a first semiconductor die disposed in the encapsulant;
a second semiconductor die disposed in the encapsulant; and
a conductive post disposed between the first semiconductor die and second semiconductor die.

23. The semiconductor device of claim 19 , wherein the shielding layer is formed directly on the conductive post.

Assignees

• Stats Chippac Pte Ltd

Inventors

• Kim Changoh
• Jung Jinhee
• Lee Jiwon
• Jang Yujeong

Classifications

• H10W42/273

  the arrangements being between laterally adjacent chips, e.g. walls between chips · CPC title

• H10W42/267

  Patterned shielding planes · CPC title

• H10W42/276

  the arrangements being on an external surface of the package, e.g. on the outer surface of an encapsulation · CPC title

• H10W90/724

  between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

• H10P50/262

  by physical means only · CPC title