Semiconductor device and method of forming a slot in EMI shielding layer using a plurality of slot lines to guide a laser

US11640944B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11640944-B2
Application numberUS-202117307437-A
CountryUS
Kind codeB2
Filing dateMay 4, 2021
Priority dateMay 4, 2021
Publication dateMay 2, 2023
Grant dateMay 2, 2023

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A semiconductor device has a shielding layer over a semiconductor package. A plurality of slot lines define a location to form a slot in the shielding layer. The slot is formed in the shielding layer by cutting along the slot lines with a laser controlled by a scanner to read the slot lines. The slot lines include a left boundary slot line and right boundary slot line. The slot can be cut in the shielding layer by performing an edge cut along the slot lines, and performing a peel back to form the slot in the shielding layer. Alternatively, the slot can be cut in the shielding layer by performing a first cut in a first direction along the slot lines, and performing a second cut in a second direction opposite the first direction along the slot lines to form the slot in the shielding layer.

First claim

Opening claim text (preview).

What is claimed: 1. A method of forming a semiconductor device, comprising: providing a semiconductor package; forming a shielding layer over the semiconductor package; providing a plurality of slot lines on the shielding layer defining a location to form a slot in the shielding layer; and forming the slot in the shielding layer by cutting at the location along the plurality of slot lines. 2. The method of claim 1 , further including providing a laser to cut along the plurality of slot lines. 3. The method of claim 2 , further including providing a scanner to read the plurality of slot lines and control the laser to cut along the plurality of slot lines. 4. The method of claim 1 , wherein the plurality of slot lines include a left boundary slot line and a right boundary slot line. 5. The method of claim 1 , wherein forming the slot in the shielding layer includes: performing an edge cut along the plurality of slot lines; and performing a peel back along a center slot line to form the slot in the shielding layer. 6. The method of claim 1 , wherein forming the slot in the shielding layer includes: performing a first cut in a first direction along the plurality of slot lines; and performing a second cut in a second direction opposite the first direction along the plurality of slot lines to form the slot in the shielding layer. 7. A method of forming a semiconductor device, comprising: forming a shielding layer over the semiconductor device; providing a plurality of slot lines on the shielding layer; and forming a slot in the shielding layer by cutting at the location along the plurality of slot lines. 8. The method of claim 7 , further including providing a laser to cut along the plurality of slot lines. 9. The method of claim 8 , further including providing a scanner to read the plurality of slot lines and control the laser to cut along the plurality of slot lines. 10. The method of claim 7 , wherein the plurality of slot lines include a left boundary slot line and a right boundary slot line. 11. The method of claim 7 , wherein forming the slot in the shielding layer includes: performing an edge cut along the plurality of slot lines; and performing a peel back along a center slot line to form the slot in the shielding layer. 12. The method of claim 7 , wherein forming the slot in the shielding layer includes: performing a first cut in a first direction along the plurality of slot lines; and performing a second cut in a second direction opposite the first direction along the plurality of slot lines to form the slot in the shielding layer. 13. The method of claim 7 , wherein forming the slot in the shielding layer includes a corner edge and vertical sidewalls. 14. A semiconductor device, comprising: a semiconductor package; and a shielding layer formed over the semiconductor package with a plurality of slot lines on the shielding layer defining a location to form a slot in the shielding layer at the location along the plurality of slot lines. 15. The semiconductor device of claim 14 , further including a laser to form the slot along the plurality of slot lines. 16. The semiconductor device of claim 15 , further including a scanner to read the plurality of slot lines and control the laser to form the slot along the plurality of slot lines. 17. The semiconductor device of claim 14 , wherein the plurality of slot lines include a left boundary slot line and a right boundary slot line. 18. The semiconductor device of claim 14 , wherein the slot in the shielding layer includes: an edge cut along the plurality of slot lines; and a peel back along a center slot line to form the slot in the shielding layer. 19. The semiconductor device of claim 14 , wherein the slot in the shielding layer includes: a first cut in a first direction along the plurality of slot lines; and a second cut in a second direction opposite the first direction along the plurality of slot lines to form the slot in the shielding layer. 20. A semiconductor device, comprising: a shielding layer formed over the semiconductor device; and a plurality of slot lines on the shielding layer defining a location for a slot formed in the shielding layer along the plurality of slot lines. 21. The semiconductor device of claim 20 , further including a laser to form the slot along the plurality of slot lines. 22. The semiconductor device of claim 21 , further including a scanner to read the plurality of slot lines and control the laser to form the slot along the plurality of slot lines. 23. The semiconductor device of claim 20 , wherein the plurality of slot lines include a left boundary slot line and a right boundary slot line. 24. The semiconductor device of claim 20 , wherein the slot in the shielding layer includes: an edge cut along the plurality of slot lines; and a peel back along a center slot line to form the slot in the shielding layer. 25. The semiconductor device of claim 20 , wherein the slot in the shielding layer includes: a first cut in a first direction along the plurality of slot lines; and a second cut in a second direction opposite the first direction along the plurality of slot lines to form the slot in the shielding layer. 26. A semiconductor device, comprising: a semiconductor package; and a shielding layer formed over the semiconductor package with a plurality of slot lines on the shielding layer defining a location to form a slot in the shielding layer at the location defined by the plurality of slot lines. 27. The semiconductor device of claim 26 , further including a laser to form the slot along the plurality of slot lines. 28. The semiconductor device of claim 27 , further including a scanner to read the plurality of slot lines and control the laser to form the slot along the plurality of slot lines. 29. The semiconductor device of claim 26 , wherein the plurality of slot lines include a left boundary slot line and a right boundary slot line. 30. The semiconductor device of claim 26 , wherein the slot in the shielding layer includes: an edge cut along the plurality of slot lines; and a peel back along a center slot line to form the slot in the shielding layer. 31. The semiconductor device of claim 26 , wherein the slot in the shielding layer includes: a first cut in a first direction along the plurality of slot lines; and a second cut in a second direction opposite the first direction along the plurality of slot lines to form the slot in the shielding layer.

Assignees

Inventors

Classifications

  • Subject matter not provided for in other groups of this subclass · CPC title

  • the arrangements being between laterally adjacent chips, e.g. walls between chips · CPC title

  • the arrangements being on an external surface of the package, e.g. on the outer surface of an encapsulation · CPC title

  • Bond pads specially adapted therefor · CPC title

  • Compression bonding, e.g. thermocompression bonding · CPC title

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What does patent US11640944B2 cover?
A semiconductor device has a shielding layer over a semiconductor package. A plurality of slot lines define a location to form a slot in the shielding layer. The slot is formed in the shielding layer by cutting along the slot lines with a laser controlled by a scanner to read the slot lines. The slot lines include a left boundary slot line and right boundary slot line. The slot can be cut in th…
Who is the assignee on this patent?
Stats Chippac Pte Ltd
What technology area does this patent fall under?
Primary CPC classification H10W42/20. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue May 02 2023 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 5 related publications on this page (citations in our corpus or others sharing the same primary CPC).