CMP safe alignment mark

Patent metadata

Field	Value
Publication number	US-12255150-B2
Application number	US-202117369841-A
Country	US
Kind code	B2
Filing date	Jul 7, 2021
Priority date	Sep 30, 2020
Publication date	Mar 18, 2025
Grant date	Mar 18, 2025

Abstract

The current disclosure describes techniques for making an alignment mark on a wafer. A recess is etched in a first surface region of a wafer. A device structure is formed in a second surface region of the wafer. A dielectric layer is deposited on the first surface of the wafer and filling the recess. A first planarization procedure is conducted to planarize the dielectric layer. After the first planarization procedure, a second planarization procedure is conducted to device structures on the second surface region of the wafer.

First claim

The invention claimed is:

1. A method, comprising:
forming a recess in a first region of a first surface of a wafer, the first region designated for an alignment mark, the recess extending in and downwardly beyond a first layer on a substrate of the wafer;
forming a device structure in a second region of the first surface of the wafer, the device structure extending in the first layer;
depositing a second layer on the first surface of the wafer, the second layer filling in the recess and at least laterally adjacent to the device structure;
conducting a first planarization procedure to remove a first portion of the second layer adjacent to the recess to a first level, with the device structure remaining in the first layer;
after the first planarization procedure, treating the second layer with oxygen plasma; and
after the treating the second layer with oxygen plasma, conducting a second planarization procedure to remove the device structure to a second level on the first layer.

2. The method of claim 1 , wherein the second level is a same level as the first level.

3. The method of claim 1 , wherein the treating the second layer with oxygen plasma improves surface hardness of a surface of the second layer in the recess.

4. The method of claim 1 , comprising, after the first planarization procedure, treating a surface of the second layer adjacent to the recess using oxygen plasma.

5. The method of claim 1 , wherein the second layer is silicon oxide.

6. The method of claim 1 , wherein the second layer is silicon nitride.

7. The method of claim 1 , wherein the second layer is a polymer material.

8. The method of claim 1 , wherein the second layer allows a laser light to pass through.

9. The method of claim 1 , comprising forming an isolation layer in the recess, wherein the second layer is formed on the isolation layer.

10. The method of claim 9 , wherein the isolation layer is a dielectric material that is different from the second layer.

11. A method, comprising:
forming a recess in a first region of a first surface of a wafer, the first region designated for an alignment mark, the recess extending in and downwardly beyond a first layer on a substrate of the wafer, a device structure being at least partially located in the first layer;
depositing a second layer filling in the recess, with the device structure remaining at least partially located in the first layer;
forming the alignment mark by treating the second layer with oxygen plasma; and
after the treating the second layer with oxygen plasma, conducting a planarization procedure to remove a portion of the device structure to a level on the first layer, with the device structure remaining at least partially located in the first layer.

12. The method of claim 11 , wherein the second layer is one or more of silicon oxide, silicon nitride, or a polymer material.

13. The method of claim 11 , wherein the second layer allows a laser light to pass through.

Assignees

• Taiwan Semiconductor Mfg Co Ltd

Inventors

• Hsu Huang-Jen
• Su Jheng-Si
• Liu Kung-Ming
• Hsieh Tzuyi
• Wu Feng-Inn

Classifications

• H10P95/062

  involving a dielectric removal step · CPC title

• H10P14/69433

  the material being a silicon nitride not containing oxygen, e.g. SixNy or SixByNz · CPC title

• H10P14/69215

  the material being a silicon oxide, e.g. SiO2 · CPC title

• H10P14/683

  carbon-based polymeric organic materials, e.g. polyimides, poly cyclobutene or PVC · CPC title

• H10W46/301

  for alignment · CPC title