Semiconductor package structure and related methods

Patent metadata

Field	Value
Publication number	US-12237351-B2
Application number	US-202117344082-A
Country	US
Kind code	B2
Filing date	Jun 10, 2021
Priority date	Nov 1, 2018
Publication date	Feb 25, 2025
Grant date	Feb 25, 2025

Abstract

Implementations of semiconductor packages may include: a substrate having a first side and a second side and a die having an active area on a second side of the die. A first side of the die may be coupled to the second side of the substrate. The semiconductor package may also include a glass lid having a first side and a second side. The glass lid may be coupled over a second side of the die. The semiconductor package may include a first and a second molding compound and one or more cushions positioned between a first side of the glass lid and a portion of the first molding compound. The second molding compound may be coupled to the substrate and the around the die and the glass lid.

First claim

What is claimed is:

1. A semiconductor package comprising:
a substrate;
a die coupled to the substrate;
a glass lid coupled over the die, the glass lid comprising an inner surface facing the die, an outer surface opposite the inner surface, and a sidewall between the inner surface and the outer surface; and
a first molding compound and a second molding compound forming an interface around the glass lid;
wherein the first molding compound and the second molding compound are directly coupled to the sidewall of the glass lid.

2. The package of claim 1 , further comprising wire bonds electrically coupling the die to the substrate, wherein the wire bonds are encapsulated within the first molding compound.

3. The package of claim 1 , wherein the die comprises an active area facing the glass lid.

4. The package of claim 1 , wherein the substrate is one of a stripline or a printed circuit board.

5. The package of claim 1 , further comprising a ball grid array on a first side of the substrate.

6. The package of claim 1 , further comprising one or more cushions coupled between the glass lid and the first molding compound.

7. A semiconductor package comprising:
a die coupled to a substrate;
a glass lid coupled over the die;
a first molding compound coupled to the substrate and around a portion of the die, the first molding compound comprising one or more shelves; and
a second molding compound coupled with an edge of the first molding compound, the second molding compound coupled over an outer surface of the glass lid opposite an inner surface of the glass lid facing the die;
wherein the glass lid is positioned on the one or more shelves;
wherein the die is an image sensor die.

8. The package of claim 7 , further comprising a gap between the image sensor die and the glass lid.

9. The package of claim 7 , wherein the substrate is one of a stripline or a printed circuit board.

10. The package of claim 7 , further comprising a dam positioned on the one or more shelves between the one or more shelves and the glass lid.

11. A semiconductor package comprising:
a substrate;
a die coupled to the substrate;
a glass lid coupled over the die; and
a first molding compound coupled to the substrate, the first molding compound comprising one or more shelves; and
a second molding compound coupled to the first molding compound;
wherein the glass lid is positioned on the one or more shelves;
wherein the glass lid is coupled within a recess of the first molding compound; and
wherein both the first molding compound and the second molding compound are directly coupled to a same sidewall of the glass lid.

12. The package of claim 11 , further comprising wire bonds electrically coupling the die to the substrate, wherein the wire bonds are encapsulated within the first molding compound.

13. The package of claim 11 , wherein the die is an image sensor die.

14. The package of claim 11 , wherein the substrate is one of a stripline or a printed circuit board.

15. The package of claim 11 , further comprising one or more cushions coupled between the glass lid and the first molding compound.

16. The package of claim 11 , wherein the first molding compound and the second molding compound form an interface directly coupled to a sidewall of the glass lid.

17. A semiconductor package comprising:
a substrate;
a die coupled to the substrate;
a glass lid coupled over the die; and
a first molding compound and a second molding compound forming an interface around the glass lid;
wire bonds electrically coupling the die to the substrate;
wherein the wire bonds are encapsulated within the first molding compound;
wherein the interface is directly coupled to a sidewall of the glass lid.

18. The package of claim 17 , wherein the die is an image sensor die comprising a plurality of pixels.

19. The package of claim 18 , further comprising a gap between the image sensor die and the glass lid.

Assignees

• Semiconductor Components Ind Llc

Inventors

• Hsieh Yu-Te

Classifications

• H10F39/811

  Interconnections · CPC title

• H10F39/011

  Manufacture or treatment of image sensors covered by group H10F39/12 · CPC title

• H10F39/804 Primary

  Containers or encapsulations · CPC title

• H01L27/14683

  Electricity · mapped topic

• H01L27/14636

  Electricity · mapped topic