Display screen and electronic device

Patent metadata

Field	Value
Publication number	US-12190825-B2
Application number	US-202218290507-A
Country	US
Kind code	B2
Filing date	Sep 1, 2022
Priority date	Nov 30, 2021
Publication date	Jan 7, 2025
Grant date	Jan 7, 2025

Abstract

Embodiments of this application provide a display screen and an electronic device. The display screen includes: a display unit, a gate driver on array circuit connected to the display unit, and a detection unit connected to the gate driver on array circuit. The gate driver on array circuit is configured to: generate a scan signal, and drive, by using the scan signal, the display unit to perform displaying. The detection unit is configured to: detect the scan signal of the gate driver on array circuit, and obtain and output a feedback signal, where the feedback signal is configured to determine whether a plurality of gate lines of the display unit are driven simultaneously.

First claim

What is claimed is:

1. A display screen for use in an electronic device, wherein the display screen comprises:
a display device;
a gate driver on array circuit connected to the display device; and
a detection circuit connected to the gate driver on array circuit;
wherein:
the gate driver on array circuit is configured to: generate a scan signal, and drive, by using the scan signal, the display device to perform displaying;
the detection circuit is configured to: detect the scan signal of the gate driver on array circuit, and obtain and output a feedback signal, wherein the feedback signal is configured to determine whether a plurality of gate lines of the display device are driven simultaneously;
the detection circuit comprises a first transistor, a second transistor, and a third transistor;
a gate of the first transistor is configured to receive a first voltage, a source of the first transistor is configured to receive a second voltage, a drain of the first transistor is connected to a source of the second transistor, the first voltage is a switch-on voltage of a transistor in the gate driver on array circuit, the second voltage is a switch-off voltage of the transistor in the gate driver on array circuit, and a common terminal of the drain of the first transistor and the source of the second transistor is configured to output the feedback signal;
a gate of the second transistor is connected to one gate driver on array (GoA) unit of the gate driver on array circuit, and a drain of the second transistor is connected to a drain of the third transistor; and
a gate of the third transistor is connected to another GoA unit of the gate driver on array circuit, and a source of the third transistor is configured to receive the first voltage.

2. The display screen according to claim 1 , wherein the detection circuit is connected to two GoA units at a tail end of the gate driver on array circuit.

3. The display screen according to claim 1 ,
wherein the detection circuit is further configured to connect to a display screen control circuit of the display screen, so that the detection circuit sends the feedback signal to the display screen control circuit; and
wherein the display screen control circuit is configured to determine an identification result based on the feedback signal, wherein the identification result is used to indicate whether the gate driver on array circuit uses the scan signal to drive the plurality of gate lines of the display device simultaneously.

4. The display screen according to claim 3 ,
wherein the display screen control circuit identifies that the feedback signal is the first voltage, and determines a first identification result, wherein the first identification result is used to indicate that the gate driver on array circuit does not use the scan signal to drive the plurality of gate lines of the display device simultaneously, and the first voltage is the switch-on voltage of the transistor in the gate driver on array circuit; or
wherein the display screen control circuit identifies that the feedback signal is the second voltage, and determines a second identification result, wherein the second identification result is used to indicate that the gate driver on array circuit uses the scan signal to drive the plurality of gate lines of the display device simultaneously, and the second voltage is the switch-off voltage of the transistor in the gate driver on array circuit.

5. The display screen according to claim 3 , wherein the display screen control circuit is further configured to send the identification result to a processor of the electronic device.

6. The display screen according to claim 1 ,
wherein the detection circuit is further configured to connect to a processor of the electronic device, so that the detection circuit transmits the feedback signal to the processor; and
wherein the processor is configured to determine an identification result based on the feedback signal, wherein the identification result is used to indicate whether the gate driver on array circuit uses the scan signal to drive the plurality of gate lines of the display device simultaneously.

7. The display screen according to claim 6 ,
wherein the processor identifies that the feedback signal is the first voltage, and determines a first identification result, wherein the first identification result is used to indicate that the gate driver on array circuit does not use the scan signal to drive the plurality of gate lines of the display device simultaneously, and the first voltage is the switch-on voltage of the transistor in the gate driver on array circuit; or
wherein the processor identifies that the feedback signal is the second voltage, and determines a second identification result, wherein the second identification result is used to indicate that the gate driver on array circuit uses the scan signal to drive the plurality of gate lines of the display device simultaneously, and the second voltage is the switch-off voltage of the transistor in the gate driver on array circuit.

8. The display screen according to claim 1 , wherein a length-width ratio of the first transistor is less than a length-width ratio of the second transistor, and the length-width ratio of the first transistor is less than a length-width ratio of the third transistor.

9. The display screen according to claim 1 , wherein a size of the first transistor is less than a size of the second transistor, and the size of the first transistor is less than a size of the third transistor.

10. The display screen according to claim 1 , wherein each of the first transistor, the second transistor, and the third transistor comprises an N-type thin film transistor (TFT) or a P-type TFT.

11. An electronic device, comprising:
one or more processors, a memory, and the display screen according to claim 1 ,
wherein the memory is coupled to the one or more processors, the memory is configured to store computer program code, and the computer program code comprises computer instructions.

Assignees

• Honor Device Co Ltd

Inventors

• Chen Pengming

Classifications

• G09G2330/12

  Test circuits or failure detection circuits included in a display system, as permanent part thereof · CPC title

• G09G3/3677

  suitable for active matrices only · CPC title

• G09G3/006 Primary

  Electronic inspection or testing of displays and display drivers, e.g. of LED or LCD displays (testing individual LED's G01R31/2635; testing lamps G01R31/44; testing of optical features of LCD displays G02F1/1309) · CPC title

• G09G2310/0286

  Details of a shift registers arranged for use in a driving circuit · CPC title

• G11C19/28

  using semiconductor elements (G11C19/14, G11C19/36 take precedence) · CPC title