Test circuit and display device

US11145231B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11145231-B2
Application numberUS-201817042315-A
CountryUS
Kind codeB2
Filing dateDec 19, 2018
Priority dateOct 17, 2018
Publication dateOct 12, 2021
Grant dateOct 12, 2021

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A test circuit and a display device are provided. The test circuit includes N first test pads, N second test pads, a first test circuit, a switching circuit, and a control circuit. The first test circuit is configured to output a plurality of test signals to the test pads. The control circuit outputs a control signal to the switching circuit to control the N first switching circuits to be individually turned on simultaneously, or control the N second switching circuits to be individually turned on simultaneously, thereby a one-side test of the display panel is achieved. Working states of the N first data lines or the N second data lines are determined according to a brightness of the display panel.

First claim

Opening claim text (preview).

What is claimed is: 1. A test circuit, configured to test a display panel having N first data lines and N second data lines, wherein the test circuit comprises: N first test pads, configured to connect corresponding the N first data lines; N second test pads, configured to connect corresponding the N second data lines; a first test circuit, configured to output a plurality of data signals for testing the display panel to the N first test pads and the N second test pads; a switching circuit, comprising N first switching circuits and N second switching circuits, the N first switching circuits being defined one-to-one on the N first data lines, the N second switching circuits being defined one-to-one on the N second data lines; a control circuit, configured to control the N first switching circuits to be individually turned on or to control the N second switching circuits to be individually turned on, to output the plurality of data signals to the corresponding data lines of the display panel to test the display panel, and to determine whether the N first data lines or the N second data lines are working normally according to a lightening of the display panel; and a pixel detection circuit defined on the display panel, wherein the pixel detection circuit is configured to detect an electric field intensity of the pixels on the display panel or a brightness of the pixels on the display panel when the N first switching circuits are individually turned on or the N second switching circuits are individually turned on, and to output a feedback signal to the control circuit for the control circuit to determine whether the N first data lines or the N second data lines are working normally; wherein the control circuit comprises a level output circuit and a first control circuit, a first signal output end of the level output circuit being connected with the controlled ends of the N first switching circuits, a second signal output end of the level output circuit being connected with the controlled ends of the N second switching circuits, a controlled end of the level output circuit being connected with a control end of the first control circuit, a signal input end of the first control circuit being connected to a signal output end of the pixel detection circuit; and the control circuit is further configured to: when the first test circuit outputs the data signals, output a first enable signal to the N first switching circuits to turn on the N first switching circuits and output a second enable signal to the N second switching circuits to turn off the N second switching circuits, and receive the feedback signal output by the pixel detection circuit to compare the feedback signal with a preset electric field intensity value or a preset pixel brightness value, and determine the N first data lines are abnormal when the feedback signal is less than the preset electric field intensity value or the preset pixel brightness value; and output the first enable signal to the N second switching circuits to turn on the N second switching circuits and output the second enable signal to the N first switching circuits to turn off the N first switching circuits, and receive the feedback signal output by the pixel detection circuit to compare the feedback signal with the preset electric field intensity value or the preset pixel brightness value, and determine the N second data lines are abnormal when the feedback signal is less than the preset electric field intensity value or the preset pixel brightness value. 2. The test circuit of claim 1 , wherein the first data lines or the second data lines connect the test pads and pixels on the display panel. 3. The test circuit of claim 1 , wherein the test circuit further comprises a third test pad and a fourth test pad, controlled ends of the N first switching circuits being interconnected with a signal output end of the third test pad, controlled ends of the N second switching circuits being interconnected with a signal output end of the fourth test pad. 4. The test circuit of claim 3 , wherein the N first test pads, the N second test pads, the third test pad, and the fourth test pad are disposed side by side and in parallel with the display panel. 5. The test circuit of claim 1 , wherein the first switching circuits and the second switching circuits are Metal-Oxide-Semiconductor transistors. 6. The test circuit of claim 5 , wherein the first switching circuits and the second switching circuits are N-Metal-Oxide-Semiconductor transistors. 7. The test circuit of claim 1 , wherein the control circuit and the first test circuit are integrated on a circuit board. 8. A display device, wherein the display device comprises: a display panel; and a drive circuit; wherein the drive circuit comprises a test circuit configured to test the display panel having N first data lines and N second data lines, the test circuit comprising: N first test pads, configured to connect corresponding the N first data lines; N second test pads, configured to connect corresponding the N second data lines; a first test circuit, configured to output a plurality of data signals for testing the display panel to the N first test pads and the N second test pads; a switching circuit, comprising N first switching circuits and N second switching circuits, the N first switching circuits being defined one-to-one on the N first data lines, the N second switching circuits being defined one-to-one on the N second data lines; a control circuit, configured to control the N first switching circuits to be individually turned on or to control the N second switching circuits to be individually turned on, to output the plurality of the data signals to the corresponding data lines of the display panel to test the display panel, and to determine whether the N first data lines or the N second data lines are working normally according to a lightening of the display panel; and a pixel detection circuit defined on the display panel, wherein the pixel detection circuit is configured to detect an electric field intensity of the pixels on the display panel or a brightness of the pixels on the display panel when the N first switching circuits are individually turned on or the N second switching circuits are individually turned on, and to output a feedback signal to the control circuit for the control circuit to determine whether the N first data lines or the N second data lines are working normally; wherein the control circuit comprises a level output circuit and a first control circuit, a first signal output end of the level output circuit being connected with the controlled ends of the N first switching circuits, a second signal output end of the level output circuit being connected with the controlled ends of the N second switching circuits, a controlled end of the level output circuit being connected with a control end of the first control circuit, a signal input end of the first control circuit being connected to a signal output end of the pixel detection circuit, and the control circuit is further configured to: when the first test circuit outputs the data signals, output a first enable signal to the N first switching circuits to turn on the N first switching circuits and output a second enable signal to the N second switching circuits to turn off the N second switching circuits, and receive the feedback signal output by the pixel detection circuit to compare the feedback signal with a preset electric field intensity value or a preset pixel brightness value, and determine the N first data lines are abnormal when the feedback signal is less than the preset electric field intensity value or the preset pixel brightness value; and output the first enable signal to the N second switching circuits

Assignees

Inventors

Classifications

  • Integration of the drivers onto the display substrate · CPC title

  • G09G3/006Primary

    Electronic inspection or testing of displays and display drivers, e.g. of LED or LCD displays (testing individual LED's G01R31/2635; testing lamps G01R31/44; testing of optical features of LCD displays G02F1/1309) · CPC title

  • suitable for active matrices only · CPC title

  • Layout of electrodes and connections · CPC title

  • the light originating from the display screen · CPC title

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Frequently asked questions

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What does patent US11145231B2 cover?
A test circuit and a display device are provided. The test circuit includes N first test pads, N second test pads, a first test circuit, a switching circuit, and a control circuit. The first test circuit is configured to output a plurality of test signals to the test pads. The control circuit outputs a control signal to the switching circuit to control the N first switching circuits to be indiv…
Who is the assignee on this patent?
Hkc Corp Ltd, Chongqing Hkc Optoelectronics Tech Co Ltd
What technology area does this patent fall under?
Primary CPC classification G09G3/006. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Oct 12 2021 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 12 related publications on this page (citations in our corpus or others sharing the same primary CPC).