High critical temperature metal nitride layer with oxide or oxynitride seed layer

US12185643B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-12185643-B2
Application numberUS-202318177096-A
CountryUS
Kind codeB2
Filing dateMar 1, 2023
Priority dateFeb 21, 2020
Publication dateDec 31, 2024
Grant dateDec 31, 2024

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  1. Title

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  2. Abstract

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  5. First independent claim

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Abstract

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A superconducting device includes a substrate, a metal oxide or metal oxynitride seed layer on the substrate, and a metal nitride superconductive layer disposed directly on the seed layer. The seed layer is an oxide or oxynitride of a first metal, and the superconductive layer is a nitride of a different second metal.

First claim

Opening claim text (preview).

What is claimed is: 1. A superconducting device, comprising: a dielectric or semiconductive substrate; a metal oxide or metal oxynitride seed layer on the dielectric or semiconductive substrate, the metal oxide or metal oxynitride seed layer being an oxide or oxynitride of a first metal; a distributed Bragg reflector between the dielectric or semiconductive substrate and the metal oxide or metal oxynitride seed layer; and a metal nitride superconductive layer disposed directly on the metal oxide or metal oxynitride seed layer, the superconductive layer being a nitride of a different second metal and patterned to form a wire. 2. A superconducting device, comprising: a dielectric or semiconductive substrate; a metal oxide or metal oxynitride seed layer on the dielectric or semiconductive substrate, the metal oxide or metal oxynitride seed layer being an oxide or oxynitride of a first metal; an optical waveguide between the dielectric or semiconductive substrate and the metal oxide or metal oxynitride seed layer to receive light propagating substantially parallel to a top surface of the dielectric or semiconductive substrate; and a metal nitride superconductive layer disposed directly on the metal oxide or metal oxynitride seed layer, the superconductive layer being a nitride of a different second metal and patterned to form a wire. 3. A superconducting device, comprising: a dielectric or semiconductive substrate; a metal oxide or metal oxynitride seed layer on the dielectric or semiconductive substrate, the seed layer being an oxide or oxynitride of a first metal; a metal nitride seed layer between the metal oxide or metal oxynitride seed layer and the dielectric or semiconductive substrate, wherein the metal nitride seed layer is a nitride of the first metal; and a metal nitride superconductive layer disposed directly on the metal oxide or metal oxynitride seed layer, the superconductive layer being a nitride of a different second metal and patterned to form a wire. 4. The device of claim 3 , wherein the metal nitride seed layer has a thickness of 3-50 nm. 5. The device of claim 3 , wherein the different second metal is niobium nitride, titanium nitride, or niobium titanium nitride. 6. The device of claim 5 , wherein the metal nitride superconductive layer comprises δ-phase NbN. 7. A superconducting device, comprising: a dielectric or semiconductive substrate; a metal oxide or metal oxynitride seed layer disposed directly on the dielectric or semiconductive substrate, the metal oxide or metal oxynitride seed layer being an oxide or oxynitride of a first metal; and a metal nitride superconductive layer disposed directly on the metal oxide or metal oxynitride seed layer, the superconductive layer being a nitride of a different second metal and patterned to form a wire. 8. The device of claim 7 , wherein the metal oxide or metal oxynitride seed layer comprises aluminum nitride (AIN) or niobium nitride (NbN) and provides a higher critical temperature to the metal nitride superconductive layer than a metal nitride layer of the first metal. 9. The device of claim 7 , wherein the different second metal is niobium nitride, titanium nitride, or niobium titanium nitride. 10. The device of claim 9 , wherein the metal nitride superconductive layer comprises 8-phase NbN. 11. The device of claim 9 , wherein the first metal is aluminum. 12. The device of claim 7 , where the metal oxide or metal oxynitride seed layer has a thickness less than 2 nm. 13. The device of claim 7 , wherein the metal oxide or metal oxynitride seed layer has a thickness of 3-50 nm. 14. The device of claim 7 , further comprising a capping layer on the superconductive layer. 15. The device of claim 7 , including only one of the metal nitride superconductive layer. 16. The device of claim 7 , wherein the metal nitride superconductive layer has a thickness of 4 to 50 nm. 17. The device of claim 1 , wherein the different second metal is niobium nitride, titanium nitride, or niobium titanium nitride. 18. The device of claim 17 , wherein the metal nitride superconductive layer comprises δ-phase NbN. 19. The device of claim 2 , wherein the different second metal is niobium nitride, titanium nitride, or niobium titanium nitride. 20. The device of claim 19 , wherein the metal nitride superconductive layer comprises δ-phase NbN.

Assignees

Inventors

Classifications

  • Josephson-effect devices · CPC title

  • of the integrated circuit kind (electric integrated circuits H10B, H10D84/00 - H10D89/00, H10F19/00, H10F39/00, H10H29/00, H10K19/00, H10K39/00, H10K59/00, H10N19/00, H10N39/00, H10N59/00, H10N69/00, H10N79/00, H10N89/00) · CPC title

  • Permanent superconducting devices · CPC title

  • of devices comprising nitrides or carbonitrides · CPC title

  • Switching means for devices switchable between superconducting and normal states · CPC title

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What does patent US12185643B2 cover?
A superconducting device includes a substrate, a metal oxide or metal oxynitride seed layer on the substrate, and a metal nitride superconductive layer disposed directly on the seed layer. The seed layer is an oxide or oxynitride of a first metal, and the superconductive layer is a nitride of a different second metal.
Who is the assignee on this patent?
Applied Materials Inc
What technology area does this patent fall under?
Primary CPC classification H10N60/85. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Dec 31 2024 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 12 related publications on this page (citations in our corpus or others sharing the same primary CPC).