Interconnect structure and electronic apparatus including the same

Patent metadata

Field	Value
Publication number	US-12183679-B2
Application number	US-202217902319-A
Country	US
Kind code	B2
Filing date	Sep 2, 2022
Priority date	Oct 29, 2019
Publication date	Dec 31, 2024
Grant date	Dec 31, 2024

Abstract

An interconnect structure and an electronic apparatus including the interconnect structure are provided. The interconnect structure includes a conductive layer; a dielectric layer configured to surround at least a part of the conductive layer; and a diffusion barrier layer disposed between the conductive layer and the dielectric layer and configured to limit and/or prevent a conductive material of the conductive layer from diffusing into the dielectric layer, and at least one of the dielectric layer and the diffusion barrier layer includes a boron nitride layer of a low dielectric constant.

First claim

What is claimed is:

1. A semiconductor device comprising:
a semiconductor layer;
a conductive layer electrically connected to the semiconductor layer; and
a dielectric layer surrounding at least a part of the conductive layer;
wherein the dielectric layer includes an amorphous boron nitride portion and a nanocrystalline boron nitride portion;
the amorphous boron nitride portion includes one or more crystals having a size of about 3 nm or less, and
the nanocrystalline boron nitride portion includes one or more crystals having a size of about 0.5 nm to about 100 nm.

2. The semiconductor device of claim 1 , further comprising:
a diffusion barrier layer between the conductive layer and the dielectric layer, the diffusion barrier layer configured to limit a conductive material of the conductive layer from diffusing into the dielectric layer.

3. The semiconductor device of claim 2 ,
the diffusion barrier layer comprises a material other than boron.

4. The semiconductor device of claim 1 , wherein a thickness of the dielectric layer is about 5 nm or more.

5. The semiconductor device of claim 1 , wherein the dielectric layer has a dielectric constant of about 2.5 or less at an operating frequency of 100 kHz.

6. The semiconductor device of claim 1 , wherein the dielectric layer has a ratio of boron to nitrogen of about 0.9 to about 1.1.

7. The semiconductor device of claim 1 , wherein the dielectric layer is non-porous.

8. The semiconductor device of claim 1 , wherein the dielectric layer comprises at least one pore.

9. The semiconductor device of claim 1 , wherein the dielectric layer and has a mass density of about 1 to about 3 g/cm 3 .

10. The semiconductor device of claim 1 , wherein a breakdown field of the dielectric layer and is about 4 MV-cm-1 or more.

11. The semiconductor device of claim 1 , wherein the dielectric layer has about 0.3 to about 0.6 root-mean-square (RMS) roughness value.

12. The semiconductor device of claim 1 , wherein
the dielectric layer comprises a first dielectric layer comprising a trench of a first depth, and
the conductive layer comprises a first conductive layer filling an inside of the trench.

13. The semiconductor device of claim 1 , wherein
the dielectric layer comprises a second dielectric layer comprising a via hole, and
the conductive layer comprises a second conductive layer filling an inside of the via hole.

14. The semiconductor device of claim 13 , wherein the via hole is stepped.

15. An electronic apparatus comprising:
a device layer comprising at least one of a transistor, a capacitor, and a resistor; and
the semiconductor device of claim 1 connected to the device layer.

16. The electronic apparatus of claim 15 , wherein the device layer comprises at least one of a memory device, a display device, and an integrated circuit device.

17. The semiconductor device of claim 1 , wherein the dielectric layer has a hydrogen content of about 10% or less and greater than 0%.

Assignees

• Samsung Electronics Co Ltd
• Ulsan Nat Inst Science & Tech Unist

Inventors

• Shin Hyeonjin
• Lee Minhyun
• Lee Changseok
• Shin Hyeonsuk
• Hong Seokmo

Classifications

• H10W20/4437

  the principal metal being a transition metal · CPC title

• H10W20/42

  Vias, e.g. via plugs · CPC title

• H10W20/47

  comprising two or more dielectric layers having different properties, e.g. different dielectric constants · CPC title

• H10W20/425

  Barrier, adhesion or liner layers · CPC title

• H10W20/4403

  based on metals, e.g. alloys, metal silicides (H10W20/4484 takes precedence) · CPC title