Electronic circuit with a transistor device and a biasing circuit

Patent metadata

Field	Value
Publication number	US-12166483-B2
Application number	US-202117799470-A
Country	US
Kind code	B2
Filing date	Mar 5, 2021
Priority date	Mar 6, 2020
Publication date	Dec 10, 2024
Grant date	Dec 10, 2024

Abstract

An electronic circuit is disclosed. The electronic circuit includes: a half-bridge with a first transistor device (1) and a second transistor device (1a); a first biasing circuit (3) connected in parallel with a load path of the first transistor device (1) and comprising a first electronic switch (31); a second biasing circuit (3a) connected in parallel with a load path of the second transistor device (1a) and comprising a second electronic switch (31a); and a drive circuit arrangement (DRVC). The drive circuit arrangement (DRVC) is configured to receive a first half-bridge input signal (Sin) and a second half-bridge input signal (Sina), drive the first transistor device (1) and the second electronic switch (31a) based on the first half-bridge input signal (Sin), and drive the second transistor device (1a) and the first electronic switch (31) based on the second half-bridge input signal (Sina).

First claim

The invention claimed is:

1. An electronic circuit, comprising:
a half-bridge with a first transistor device and a second transistor device;
a first biasing circuit connected in parallel with a load path of the first transistor device and comprising a first electronic switch;
a second biasing circuit connected in parallel with a load path of the second transistor device and comprising a second electronic switch; and
a drive circuit arrangement configured to:
receive a first half-bridge input signal and a second half-bridge input signal;
drive the first transistor device and the second electronic switch based on the first half-bridge input signal; and
drive the second transistor device and the first electronic switch based on the second half-bridge input signal.

2. The electronic circuit of claim 1 , wherein the drive circuit arrangement comprises:
a first drive circuit configured to drive the first transistor device based on a first input signal;
a second drive circuit configured to drive the first electronic switch based on a second input signal;
a third drive circuit configured to drive the second transistor device based on a third input signal; and
a fourth drive circuit configured to drive the second electronic switch based on a fourth input signal,
wherein each of the first input signal and the fourth input signal is dependent on the first half-bridge input signal, and
wherein each of the second input signal and the third input signal is dependent on the second half-bridge input signal.

3. The electronic circuit of claim 2 , wherein the drive circuit arrangement further comprises:
a first passive filter configured to generate the first input signal based on the first half- bridge input signal;
a second passive filter configured to generate the second input signal based on the second half-bridge input signal;
a third passive filter configured to generate the third input signal based on the second half-bridge input signal; and
a fourth passive filter configured to generate the fourth input signal based on the first half-bridge input signal.

4. The electronic circuit of claim 3 , wherein each of the first passive filter and the third passive filter comprises an RC element, and wherein each of the second passive filter and the fourth passive filter comprises a CR element.

5. The electronic circuit of claim 2 ,
wherein the drive circuit arrangement is configured to receive a supply voltage between a first supply node and a second supply node,
wherein the first drive circuit is configured to receive the supply voltage at a supply input, and
wherein each of the second, third and fourth drive circuits is configured to generate a respective internal supply voltage based on the supply voltage received between the first supply node and the second supply node of the drive circuit arrangement.

6. The electronic circuit of claim 5 ,
wherein the second drive circuit comprises a second bootstrap circuit coupled to the first and second supply nodes of the drive circuit arrangement via the first transistor device,
wherein the third drive circuit comprises a third bootstrap circuit coupled to the first and second supply nodes of the drive circuit arrangement via the first transistor device, and
wherein the fourth drive circuit comprises a bootstrap circuit coupled to a bootstrap capacitor of the third bootstrap circuit via the second transistor device.

7. The electronic circuit of claim 1 , wherein the first biasing circuit further comprises a bias voltage circuit configured to generate a bias voltage based on a supply voltage.

8. The electronic circuit of claim 7 , wherein the second biasing circuit comprises a bootstrap circuit that is configured to generate a bias voltage of the second biasing circuit based on the bias voltage generated by the bias voltage circuit of the first biasing circuit.

9. The electronic circuit of claim 7 , wherein the bias voltage is between 20V and 25V.

10. The electronic circuit of claim 7 , wherein the bias voltage is between 1.2 times and 2.5 times the supply voltage.

11. The electronic circuit of claim 1 , wherein at least one of the first and second biasing circuits comprises an inductor.

12. The electronic circuit of claim 1 , wherein the first biasing circuit further includes a first diode connected in series with the first electronic switch, and wherein the second biasing circuit further includes a second diode connected in series with the second electronic switch.

13. The electronic circuit of claim 12 , wherein each of the first and second diodes is a Schottky diode made of a wide-bandgap semiconductor material.

14. The electronic circuit of claim 13 , wherein the wide-bandgap semiconductor material is SiC.

15. An electronic circuit comprising:
a transistor device and a biasing circuit connected in parallel with a load path of the transistor device,
wherein the biasing circuit comprises a bias voltage source configured to provide a bias voltage, an electronic switch, and a diode,
wherein the biasing circuit is configured to bias the transistor device when the transistor device is in a reverse biased state,
wherein biasing the transistor device is associated with a maximum biasing current flowing from the biasing circuit into the transistor device,
wherein the diode has a maximum Schottky current, and
wherein the maximum Schottky current is higher than the maximum biasing current.

16. The electronic circuit of claim 15 ,
wherein the diode comprises a Schottky diode in parallel with a pn diode,
wherein the diode is configured to be operated in a Schottky mode in which the pn diode is inactive, and
wherein the maximum Schottky diode is a maximum current in the Schottky mode.

Assignees

• Infineon Technologies Austria Ag

Inventors

• Weber Hans
• Hirler Franz
• Kutschak Matteo-Alessandro
• Pippan Manfred
• Riegler Andreas

Classifications

• H10D62/8325

  Silicon carbide · CPC title

• H03K17/18

  Modifications for indicating state of switch · CPC title

• H02M1/082

  with digital control · CPC title

• H02M3/33571

  Half-bridge at primary side of an isolation transformer · CPC title

• H03K17/687

  the devices being field-effect transistors · CPC title