Plating and deplating currents for material co-planarity in semiconductor plating processes

Patent metadata

Field	Value
Publication number	US-12146235-B2
Application number	US-202217686129-A
Country	US
Kind code	B2
Filing date	Mar 3, 2022
Priority date	Mar 3, 2022
Publication date	Nov 19, 2024
Grant date	Nov 19, 2024

Abstract

A method of plating substrates may include placing a substrate in a plating chamber comprising a liquid, and applying a current to the liquid in the plating chamber to deposit a metal on exposed portions of the substrate, where the current may include alternating cycles of a forward plating current and a reverse deplating current. To determine the current characteristics, a model of a substrate may be simulated during the plating process to generate data points that relate characteristics of the plating process and a pattern on the substrate to a range nonuniformity of material formed on the substrate during the plating process. Using information from the data points, values for the forward and reverse currents may be derived and provided to the plating chamber to execute the plating process.

First claim

What is claimed is:

1. A method of plating substrates, the method comprising:
determining, for a plating process to be performed on a substrate, a relationship between a range nonuniformity of the plating process, and characteristics of the plating process and a pattern on the substrate;
determining a duty cycle for a forward plating current and a reverse deplating current from the relationship that minimizes the range nonuniformity;
placing the substrate in a plating chamber comprising a liquid, wherein the substrate comprises a patterned mask that exposes the substrate through a plurality of vias; and
applying a current to the liquid in the plating chamber to deposit a metal on exposed portions of the substrate, wherein the current comprises the duty cycle comprising alternating cycles of:
the forward plating current that deposits the metal unevenly in the plurality of vias at varying heights; and
the reverse deplating current that removes some of the metal in the plurality of vias such that the metal in the plurality of vias is evenly distributed.

2. The method of claim 1 , wherein the patterned mask comprises exposed portions of the substrate adjacent to an open area, wherein a current density during a plating process is more concentrated at the exposed portions of the substrate adjacent to the open area compared to exposed portions of the substrate that are not adjacent to the open area.

3. The method of claim 1 , wherein the forward plating current and the reverse deplating current are both applied in the alternating cycles in the plating chamber when the substrate is in the liquid, without using separate chambers or liquids to apply the forward plating current and the reverse deplating current.

4. The method of claim 1 , wherein the exposed portions of the substrate comprise a plurality of thru-silicon vias (TSVs), where there exists a difference between a maximum height of the TSVs and a minimum height of the TSVs.

5. The method of claim 1 , wherein a phase or cycle time of the duty cycle is selected such that the reverse deplating current is evenly distributed relative to a rotation speed of the substrate in the plating chamber.

6. The method of claim 1 , wherein a phase or cycle time of the duty cycle is selected such that the reverse deplating current is evenly distributed relative to a motion of a paddle in the plating chamber.

7. The method of claim 1 , wherein the plating chamber comprises an electrochemical deposition chamber, and the liquid comprises an electrolyte.

8. The method of claim 1 , wherein the forward plating current is applied at least 10 times as long as the deplating current.

9. The method of claim 1 , further comprising:
receiving a target deposition rate for the plating process;
receiving a forward plating rate for the plating process; and
calculating a reverse deplating rate for the plating process based on the target deposition rate, the forward plating rate, and the relationship between the range nonuniformity of the plating process and the characteristics of the plating process and the pattern on the substrate.

10. The method of claim 1 , further comprising:
calculating a reverse deplating current density for the plating process based at least in part on the relationship between the range nonuniformity of the plating process and the characteristics of the plating process and the pattern on the substrate.

11. The method of claim 1 , wherein the relationship between the range nonuniformity of the plating process and the characteristics of the plating process and the pattern on the substrate comprises a linear relationship.

12. The method of claim 1 , wherein the relationship between the range nonuniformity of the plating process and the characteristics of the plating process and the pattern on the substrate comprises a nonlinear relationship.

13. The method of claim 1 , wherein the characteristics of the plating process comprise a bath conductivity in a film resistance.

14. The method of claim 1 , wherein the pattern on the substrate comprises a characteristic length of the pattern and a width of the pattern.

15. The method of claim 1 , wherein determining the relationship between the range nonuniformity of the plating process, and the characteristics of the plating process and the pattern on the substrate comprises:
collecting data points from experimental data using different bath conductivities and plating rates to characterize the range nonuniformity.

16. The method of claim 1 , wherein the alternating cycles of the forward plating current and reverse deplating current are applied evenly relative to a rotation speed of the substrate and a motion of a paddle in the plating chamber.

17. The method of claim 1 , wherein determining the relationship between the range nonuniformity of the plating process, and the characteristics of the plating process and the pattern on the substrate comprises:
simulating a model of the substrate during a plating process to generate data points that relate the characteristics of the plating process and the pattern on the substrate to a predicted range nonuniformity of the metal on the substrate for the forward plating current and the reverse deplating current.

18. The method of claim 17 , further comprising, prior to applying the current to the liquid in the plating chamber:
determining a value for the reverse deplating current using the data points that relate the characteristics of the plating process and the pattern on the substrate to the predicted range nonuniformity of the metal on the substrate.

19. The method of claim 17 , further comprising, prior to applying the current to the liquid in the plating chamber:
determining the duty cycle for the alternating cycles of the forward plating current and the reverse deplating current using the data points that relate the characteristics of the plating process and the pattern on the substrate to the predicted range nonuniformity of the metal on the substrate.

20. A system comprising:
a plating chamber comprising a liquid configured to receive a substrate comprising a patterned mask that exposes the substrate through a plurality of vias; and
a controller configured to perform operations comprising:
determining, for a plating process to be performed on the substrate, a relationship between a range nonuniformity of the plating process, and characteristics of the plating process and a pattern on the substrate;
determining a duty cycle for a forward plating current and a reverse deplating current from the relationship that minimizes the range nonuniformity; and
causing a current to be applied to the liquid in the plating chamber to deposit a metal on exposed portions of the substrate, wherein the current comprises alternating cycles of: the forward plating current that deposits the metal unevenly in the plurality of vias at varying heights; and
the reverse deplating current that removes some of the metal in the plurality of vias such that the metal in the plurality of vias is evenly distributed.

Assignees

• Applied Materials Inc

Inventors

• Mchugh Paul R
• Sharbono Charles
• Xu Jing
• Klocke John L
• Lee Sam K
• Ypma Keith Edward

Classifications

• H10W20/0261

  characterised by the filling method or the material of the conductive fill · CPC title

• H10W20/023

  the interconnections being through-semiconductor vias · CPC title

• H10P14/47

  Electrolytic deposition, i.e. electroplating; Electroless plating · CPC title

• G06F30/20 Primary

  Design optimisation, verification or simulation (optimisation, verification or simulation of circuit designs G06F30/30) · CPC title

• C25F3/02

  Etching · CPC title