LED chip-to-chip vertically launched optical communications with optical fiber

Patent metadata

Field	Value
Publication number	US-12101128-B2
Application number	US-202318460297-A
Country	US
Kind code	B2
Filing date	Sep 1, 2023
Priority date	Mar 5, 2021
Publication date	Sep 24, 2024
Grant date	Sep 24, 2024

Abstract

Multi-chip modules in different semiconductor packages may be optically data coupled by way of LEDs and photodetectors linked by a multicore fiber. The multicore fiber may pass through apertures in the semiconductor packages, with an array of LEDs and photodetectors in the semiconductor package providing and receiving, respectively, optical signals comprised of data passed between the multi-chip modules.

First claim

What is claimed is:

1. An optically interconnected system, comprising:
a multicore fiber;
a first semiconductor package with a first aperture to receive a first end of the multicore fiber;
a second semiconductor package with a second aperture to receive a second end of the multicore fiber;
first semiconductor logic circuitry mounted on a first substrate in the first semiconductor package;
first transceiver circuitry, in the first semiconductor package, electrically coupled to the first semiconductor logic circuitry;
a plurality of first microLEDs, in the first semiconductor package, electrically coupled to be driven by the first transceiver circuitry, the plurality of first microLEDs positioned to emit light into the first end of the multicore fiber;
a plurality of first photodetectors, in the first semiconductor package, electrically coupled to provide signals to the first transceiver circuitry, the plurality of first photodetectors positioned to receive light from the first end of the multicore fiber;
second semiconductor logic circuitry mounted on a second substrate in the second semiconductor package;
second transceiver circuitry, in the second semiconductor package, electrically coupled to the second semiconductor logic circuitry;
a plurality of second microLEDs, in the second semiconductor package, electrically coupled to be driven by the second transceiver circuitry, the plurality of second microLEDs positioned to emit light into the second end of the multicore fiber; and
a plurality of second photodetectors, in the second semiconductor package, electrically coupled to provide signals to the second transceiver circuitry, the plurality of second photodetectors positioned to receive light from the second end of the multicore fiber
wherein the system further comprises first microLED reflectors for reflecting light from the plurality of first microLEDs optically towards the first end of the multicore fiber and second microLED reflectors for reflecting light from the plurality of second microLEDs optically towards the second end of the multicore fiber;
wherein the system further comprises first photodetector reflectors for reflecting light from the first end of the multicore fiber optically towards the plurality of first photodetectors and second photodetector reflectors for reflecting light from the second end of the multicore fiber optically towards the plurality of second photodetectors;
wherein the first aperture is in a side of the first semiconductor package and the second aperture is in a side of the second semiconductor package.

2. The system of claim 1 , wherein the first transceiver circuitry is mounted to the first substrate and the second transceiver circuitry is mounted to the second substrate.

3. The system of claim 1 , wherein the first semiconductor logic circuitry is in a first chip, the first transceiver circuitry is in a second chip, the second semiconductor logic circuitry is in a third chip, and the second transceiver circuitry is in a fourth chip.

4. The system of claim 1 , wherein the first semiconductor logic circuitry is in a first chip, the first transceiver circuitry is in the first chip, the second semiconductor logic circuitry is in a second chip, and the second transceiver circuitry is in the second chip.

5. The system of claim 1 , wherein the plurality of first photodetectors are formed in a first chip and the plurality of first microLEDs are mounted on the first chip, and the plurality of second photodetectors are formed in a second chip and the plurality of second microLEDs are mounted on the second chip.

6. The system of claim 1 , further comprising a first ninety degree reflector between the plurality of first microLEDs and the first end of the multicore fiber and a second ninety degree reflector between the plurality of second microLEDs and the second end of the multicore fiber.

7. The system of claim 6 , wherein the first LEDs and the first photodetectors are arranged in a first array, with the first LEDs and the first photodetectors having mirror-image LED-photodetector symmetry about a plane bisecting the first array, and the second LEDs and the second photodetectors are arranged in a second array with the second LEDs and the second photodetectors having mirror-image LED-photodetector symmetry about a plane bisecting the second array, such that the first LEDs are linked via the multicore fiber with the second photodetectors and the second LEDs are linked via the multicore fiber with the first photodetectors.

8. The system of claim 7 , wherein the multicore fiber is a coherent multicore fiber.

9. The system of claim 1 , wherein the first semiconductor package is mounted to a circuit board and the second semiconductor package is mounted to the circuit board.

10. The system of claim 1 , wherein the multicore fiber is a coherent multicore fiber.

Assignees

• Avicenatech Corp

Inventors

• Pezeshki Bardia
• Kalman Robert
• Tselikov Alexander
• Danesh Cameron

Classifications

• G02B6/02042

  Multicore optical fibres · CPC title

• G02B6/4298

  coupling with non-coherent light sources and/or radiation detectors, e.g. lamps, incandescent bulbs, scintillation chambers · CPC title

• G02B6/43 Primary

  Arrangements comprising a plurality of opto-electronic elements and associated optical interconnections · CPC title

• G02B6/12021

  Comprising cascaded AWG devices; AWG multipass configuration; Plural AWG devices integrated on a single chip · CPC title

• H04B10/803 Primary

  Free space interconnects, e.g. between circuit boards or chips · CPC title